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liminghui12Rbb666
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renesas R9A07G0 PWM框架 GPT时钟修改为 FSP_PRIV_CLOCK_PCLKGPTL
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bsp/renesas/libraries/HAL_Drivers/drv_pwm.c

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -53,19 +53,24 @@ static struct ra_pwm ra6m4_pwm_obj[BSP_PWMS_NUM] =
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#endif
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};
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56+
#ifdef SOC_SERIES_R9A07G0
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#define FSP_PRIV_CLOCK FSP_PRIV_CLOCK_PCLKGPTL
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#else
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#define FSP_PRIV_CLOCK FSP_PRIV_CLOCK_PCLKD
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#endif
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/* Convert the raw PWM period counts into ns */
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static rt_uint32_t _convert_counts_ns(uint32_t source_div, uint32_t raw)
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{
60-
uint32_t pclkd_freq_hz = R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_PCLKD) >> source_div;
65+
uint32_t pclkd_freq_hz = R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK) >> source_div;
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uint32_t ns = (uint32_t)(((uint64_t)raw * 1000000000ULL) / pclkd_freq_hz);
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return ns;
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}
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/* Convert ns into raw PWM period counts */
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static rt_uint32_t _convert_ns_counts(uint32_t source_div, uint32_t raw)
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{
68-
uint32_t pclkd_freq_hz = R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_PCLKD) >> source_div;
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uint32_t pclkd_freq_hz = R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK) >> source_div;
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uint32_t counts = (uint32_t)(((uint64_t)raw * (uint64_t)pclkd_freq_hz) / 1000000000ULL);
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return counts;
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}

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