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Copy file name to clipboardExpand all lines: _posts/2021-12-01-86box-v3-0.md
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[**OBattler**](https://github.com/OBattler) overhauled the Intel 430 series chipset emulation and introduced the 440 series, with [**tiseno100**](https://github.com/tiseno100) bringing in additional variants. Highlights include the legendary **440BX** for the Pentium II platform, and the **430TX** for the Pentium platform. The lesser-known 420 series for the 486 platform was also expanded by [**OBattler**](https://github.com/OBattler), with the 420EX and 420ZX joining the existing 420TX.
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<aname="smsc" />[**richardg867**](https://github.com/richardg867) and [**OBattler**](https://github.com/OBattler) expanded upon the Intel 440 work by adding the **SMSC VictoryBX-66**, a relatively unknown combination of Intel's acclaimed 440BX northbridge and Standard Microsystems' **SLC90E66 Victory66** southbridge, [announced in late 2000](https://www.eetimes.com/smc-begins-sampling-pc-chip-set-line-for-pentium-based-systems/) and released in early 2001 as the product of a technology exchange agreement between the two companies. This chipset's obscurity was a result of its late release; the 440BX northbridge was quite outdated by 2001, with the final nail in its coffin put by the Intel 815 chipset released the year before, ending the notorious Intel-Rambus disaster which had extended the BX's life for motherboard manufacturers.
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[**richardg867**](https://github.com/richardg867) and [**OBattler**](https://github.com/OBattler) expanded upon the Intel 440 work by adding the **SMSC VictoryBX-66**, a relatively unknown combination of Intel's acclaimed 440BX northbridge and Standard Microsystems' **SLC90E66 Victory66** southbridge, [announced in late 2000](https://www.eetimes.com/smc-begins-sampling-pc-chip-set-line-for-pentium-based-systems/) and released in early 2001 as the product of a technology exchange agreement between the two companies. This chipset's obscurity was a result of its late release; the 440BX northbridge was quite outdated by 2001, with the final nail in its coffin put by the Intel 815 chipset released the year before, ending the notorious Intel-Rambus disaster which had extended the BX's life for motherboard manufacturers.
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{: #smsc}
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Chipsets from the **VIA Apollo** series were also added, ranging from the **VPX** for the Pentium platform to the **Pro 133A** for the Pentium II/III platform, with [**tiseno100**](https://github.com/tiseno100) working on the northbridges and [**richardg867**](https://github.com/richardg867) on the southbridges. One highlight is the **MVP3**, seen by many as the best Super Socket 7 chipset ever made.
Copy file name to clipboardExpand all lines: _posts/2022-01-07-pcem-migration-guide.md
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## <aname="performance" />Performance will be different
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## Performance will be different
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One aspect commonly used to compare PCem and 86Box is the emulation performance. There is indeed such a difference, but not everything is as black and white as it seems.
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PCem's emulation of some core system components, such as the Programmable Interval Timer (PIT), takes a few shortcuts to improve performance. These shortcuts are perfectly fine for games, which is what PCem targets; although, they have caused issues with the software preservation side of things, as we found out with **Microsoft Word 1.0**, the **MR BIOS** and other old pieces of software.
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<aname="cache" />In addition to taking fewer shortcuts, 86Box also tries to follow the specifications of these components, rather than implement the minimum viable feature set, which is - once again - good enough for games, but not good enough for some other applications. Generally speaking, the more accurate a component's emulation is made, the more host CPU horsepower it will require. There are certain limits to what's attainable to emulate (as an example, we don't do CPU caches, as that is too complex [even for other non-PC emulators](https://dolphin-emu.org/blog/2017/02/01/dolphin-progress-report-january-2017/#50-2204-hack-to-protect-lower-mem1-from-malicious-game-code-by-booto"Our issues involved cache test errors on some BIOSes")\), but we try to follow what's possible.
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In addition to taking fewer shortcuts, 86Box also tries to follow the specifications of these components, rather than implement the minimum viable feature set, which is - once again - good enough for games, but not good enough for some other applications. Generally speaking, the more accurate a component's emulation is made, the more host CPU horsepower it will require. There are certain limits to what's attainable to emulate (as an example, we don't do CPU caches, as that is too complex [even for other non-PC emulators](https://dolphin-emu.org/blog/2017/02/01/dolphin-progress-report-january-2017/#50-2204-hack-to-protect-lower-mem1-from-malicious-game-code-by-booto"Our issues involved cache test errors on some BIOSes")\), but we try to follow what's possible.
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{: #cache}
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## <aname="machines" />Machine list
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## Machine list
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86Box has most of the machines PCem emulates, though we have removed, renamed and/or recategorized some of them for various reasons. The table below (make sure to scroll down) provides a reference for **v4.0**.
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|[Super 7] FIC VA-503+ | Super Socket 7:<br />[VIA MVP3] FIC VA-503+ | Not to be confused with the FIC VA-503**A**, which has a different southbridge. |
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3. Copy the `<configuration name>.<PCem machine name>.nvr` file from PCem's `nvr` folder to the 86Box machine's `nvr` folder, **using the same name** as the `.nvr` file created by 86Box.
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4. If the machine is equipped with Flash ROM, copy the `flash.bin` file from PCem's `roms` folder for the machine you're emulating to the 86Box machine's `nvr` folder, **using the same name** as the `.bin` file created by 86Box.
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### <aname="piix" />PIIX southbridge mismatch
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### PIIX southbridge mismatch
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PCem's implementation of the Intel 430HX, 430VX and 440FX chipsets uses the **PIIX** southbridge, while real motherboards and 86Box use the **PIIX3**. Some operating systems, such as Windows NT/2000/XP, will fail to boot after a PIIX to PIIX3 transition (and vice-versa) due to the IDE controller's new PCI ID.
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### Machine
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* The machine list is split into **categories**, with the [tag] before a machine's name denoting its chipset instead of its category. The [table above](#machines) can help you locate PCem's machines on 86Box.
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* The machine list is split into **categories**, with the [tag] before a machine's name denoting its chipset instead of its category. The [table above](#machine-list) can help you locate PCem's machines on 86Box.
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* The CPU list is split into **families** instead of manufacturers.
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* Only CPUs that are **actually compatible** with the selected machine will be listed. There are some pitfalls, such as not all Super Socket 7 motherboards supporting the original Pentium without MMX.
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* Time synchronization has two options: **Local time** behaves like PCem and is ideal for running DOS and Windows, while **UTC time** is ideal for running Linux and other OSes which store time that way.
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### Input
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*<aname="mousebtns" />86Box can emulate serial and PS/2 mice with **three buttons** or a **scroll wheel**. This functionality can be enabled through the **Configure** button next to the mouse selection box.
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* 86Box can emulate serial and PS/2 mice with **three buttons** or a **scroll wheel**. This functionality can be enabled through the **Configure** button next to the mouse selection box.
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* The **4-axis 4-button** joystick allows for a more modern control scheme (if supported by the emulated software), which takes advantage of all 4 axes and 4 buttons that the game port provides.
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### Network
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{% include image.html url="/assets/images/pcem-migration/media.png" description="Media controls through the Media menu and status bar." %}
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Note that the key combination to release mouse capture on 86Box is **F8+F12**, as we've found PCem's Ctrl+End to conflict with some applications. You can also use the middle mouse button to release capture, unless a [three-button or wheel mouse](#mousebtns) is configured.
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Note that the key combination to release mouse capture on 86Box is **F8+F12**, as we've found PCem's Ctrl+End to conflict with some applications. You can also use the middle mouse button to release capture, unless a [three-button or wheel mouse](#input) is configured.
Copy file name to clipboardExpand all lines: _posts/2022-03-21-why-not-p3.md
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As all these years went by, we realized emulating faster CPUs than the Pentium II at practical speeds would not be achievable, not without a **very big** (even bigger than Apple's M1 was) **and unprecedented breakthrough** in performance of either desktop CPUs or the dynamic recompiler we inherited from PCem; we knew an absolute beast of a CPU (which turned out to be the Ryzen 9 5950X) would be required to emulate the entry-level 233 MHz Pentium II at a speed good enough for games, let alone higher clock speeds.
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A decision was therefore made to **keep** the Pentium II and Celeron CPUs, with lower off-spec clock speeds available for people with older and/or lower-end host CPUs that aren't up to emulating the actual clocks these CPUs were released with at a reasonable speed, and to not develop any more iterations of the Intel P6 core or other faster cores, focusing any CPU-related efforts into improving the dynamic recompiler's performance and closing our [performance gap]({% post_url 2022-01-07-pcem-migration-guide %}#performance) in relation to PCem. The [VIA Cyrix III](https://en.wikipedia.org/wiki/Cyrix_III) was an exception, as it's significantly slower than a Pentium II clock-for-clock, and being based on the [IDT WinChip](https://en.wikipedia.org/wiki/WinChip), much of its infrastructure was already in place.
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A decision was therefore made to **keep** the Pentium II and Celeron CPUs, with lower off-spec clock speeds available for people with older and/or lower-end host CPUs that aren't up to emulating the actual clocks these CPUs were released with at a reasonable speed, and to not develop any more iterations of the Intel P6 core or other faster cores, focusing any CPU-related efforts into improving the dynamic recompiler's performance and closing our [performance gap]({% post_url 2022-01-07-pcem-migration-guide %}#performance-will-be-different) in relation to PCem. The [VIA Cyrix III](https://en.wikipedia.org/wiki/Cyrix_III) was an exception, as it's significantly slower than a Pentium II clock-for-clock, and being based on the [IDT WinChip](https://en.wikipedia.org/wiki/WinChip), much of its infrastructure was already in place.
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