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Commit f946956

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fix: use correct PINs
This updates the pins according to the carrier PCB layout Signed-off-by: Marvin Drees <marvin.drees@9elements.com>
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application/src/main.rs

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -120,16 +120,16 @@ async fn main(spawner: Spawner) {
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// Register DB with the web layer (all handlers access it via crate::web::db())
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web::init_db(db);
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123-
// 4. GPIO outputs for 8 relay outputs (PIN_0PIN_7)
123+
// 4. GPIO outputs for 8 relay outputs (PIN_2PIN_9)
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let relay_pins = [
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Output::new(p.PIN_0, Level::Low),
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Output::new(p.PIN_1, Level::Low),
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Output::new(p.PIN_2, Level::Low),
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Output::new(p.PIN_3, Level::Low),
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Output::new(p.PIN_4, Level::Low),
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Output::new(p.PIN_5, Level::Low),
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Output::new(p.PIN_6, Level::Low),
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Output::new(p.PIN_7, Level::Low),
131+
Output::new(p.PIN_8, Level::Low),
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Output::new(p.PIN_9, Level::Low),
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];
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// 6. Spawn GPIO task
@@ -209,9 +209,9 @@ async fn main(spawner: Spawner) {
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&mut common,
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sm0,
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sm1,
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p.PIN_8, // CF — active-power pulse input
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p.PIN_9, // CF1 — current/voltage RMS pulse input
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Output::new(p.PIN_10, Level::Low), // SEL — LOW = current mode (startup default)
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p.PIN_0, // CF — active-power pulse input
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p.PIN_1, // CF1 — current/voltage RMS pulse input
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Output::new(p.PIN_22, Level::Low), // SEL — LOW = current mode (startup default)
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HLW8012_R_SENSE,
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HLW8012_V_RATIO,
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HLW8012_PULSE_TIMEOUT_MS,

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