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feat: add SEV-SNP und SEV-ES tests
Signed-off-by: Christian Walter <christian.walter@9elements.com>
1 parent 7258851 commit 0dc5a98

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+96
-7
lines changed

2 files changed

+96
-7
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cmd/core/amd-suite/TESTPLAN.md

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,10 +18,12 @@ Id | Group | Test | Implemented | Reference | Notes
1818
24 | SME | Verify SME Functionality | :white_check_mark: | - | Check if Memory Pages are marked for encryption
1919
25 | SME | TSME Support | :white_check_mark: | - | Test checks CPUID.0x8000001F[EAX].bit[13]
2020
26 | SME | TSME Enabled | :white_check_mark: | - | Test checks MSR 0xC0010010[18]
21-
30 | SEV | SEV Support | :x: | - | Test checks `0x8000001f`
22-
31 | SEV | SEV Enabled | :x: | - | Test checks `MSR_AMD64_SEV`
21+
30 | SEV | SEV Support | :white_check_mark: | - | Test checks `0x8000001f`
22+
31 | SEV | SEV Enabled | :white_check_mark: | - | Test checks `MSR_AMD64_SEV`
2323
32 | SEV | SEV Firmware Version Validation | :x: | - | Verify the SEV Firmware Version
2424
33 | SEV | SEV Guest Configuration Validation | :x: | - | Verify the Guest Configuration for a VM
25+
34 | SEV | SEV-ES Support | :white_check_mark: | - | Test checks CPUID.0x8000001F[EAX].bit[3]
26+
35 | SEV | SEV-ES Enabled | :white_check_mark: | - | Test checks MSR 0xC0010131[1]
2527
40 | SEV-SNP| SEV-SNP Support | :white_check_mark: | - | -
2628
41 | SEV-SNP| SEV-SNP Enabled | :x: | - | -
2729
42 | SEV-SNP| SEV-SNP Debug Registers disabled | :x: | - | CPU Debug Registers can be enabled / disabled through `SEV_FEATURES`

pkg/test/amd_tests.go

Lines changed: 92 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -48,6 +48,25 @@ const (
4848
)
4949

5050
var (
51+
testSEVESupport = Test{
52+
Name: "SEV-ES Support",
53+
Required: true,
54+
function: SEVESupport,
55+
Status: Implemented,
56+
SpecificationChapter: "",
57+
SpecificiationTitle: "AMD Secure Encrypted Virtualization - Encrypted State",
58+
dependencies: []*Test{&testAMDFamilyModel},
59+
}
60+
61+
testSEVESEnabled = Test{
62+
Name: "SEV-ES Enabled",
63+
Required: true,
64+
function: SEVESEnabled,
65+
Status: Implemented,
66+
SpecificationChapter: "",
67+
SpecificiationTitle: "AMD Secure Encrypted Virtualization - Encrypted State",
68+
dependencies: []*Test{&testAMDFamilyModel},
69+
}
5170
testAMDFamilyModel = Test{
5271
Name: "Detect AMD Family and Model",
5372
Required: true,
@@ -397,12 +416,16 @@ var (
397416
TestsAMDSEV = []*Test{
398417
&testSEVSupport,
399418
&testSEVEnabled,
419+
&testSEVESupport,
420+
&testSEVESEnabled,
400421
&testSEVFirmwareVersion,
401422
&testSEVGuestConfig,
402423
}
403424
TestsAMDSEVSNP = []*Test{
404425
&testSEVSNPSupport,
405426
&testSEVSNPEnabled,
427+
&testSEVESupport,
428+
&testSEVESEnabled,
406429
&testSEVSNPDebugRegisters,
407430
&testSEVSNPSideChannelProtection,
408431
&testSEVSNPFirmwareVersion,
@@ -540,16 +563,43 @@ func SMEFunctionality(hw hwapi.LowLevelHardwareInterfaces, p *PreSet) (bool, err
540563

541564
// SEV Tests
542565

543-
// SEVSupport checks if SEV is supported
566+
// SEVSupport checks if SEV is supported by checking CPUID[0x8000001f].EAX[1]
544567
func SEVSupport(hw hwapi.LowLevelHardwareInterfaces, p *PreSet) (bool, error, error) {
545-
log.Info("SEV Support check is not implemented")
568+
eax, _, _, _ := hw.CPUID(CPUID_SEV_SNP, 0)
569+
if eax&(1<<1) == 0 {
570+
return false, fmt.Errorf("SEV is not supported on this CPU (CPUID.0x8000001F[EAX].bit[1] = 0)"), nil
571+
}
572+
log.Debugf("SEV is supported (CPUID.0x8000001F[EAX].bit[1] = 1)")
546573
return true, nil, nil
547574
}
548575

549-
// SEVEnabled checks if SEV is enabled
576+
// SEVEnabled checks if SEV is enabled by reading MSR 0xC0010131[0]
550577
func SEVEnabled(hw hwapi.LowLevelHardwareInterfaces, p *PreSet) (bool, error, error) {
551-
log.Info("SEV Enabled check is not implemented")
552-
return true, nil, nil
578+
const MSR_AMD64_SEV = 0xC0010131
579+
const MSR_AMD64_SEV_ENABLED = uint64(1) << 0 // Bit 0: SEV Enable
580+
vals := hw.ReadMSR(MSR_AMD64_SEV)
581+
msrEnabled := false
582+
if len(vals) > 0 {
583+
val := vals[0]
584+
if val&MSR_AMD64_SEV_ENABLED != 0 {
585+
msrEnabled = true
586+
}
587+
}
588+
589+
// Also check /sys/module/kvm_amd/parameters/sev if present
590+
sysfsEnabled := false
591+
if data, err := os.ReadFile("/sys/module/kvm_amd/parameters/sev"); err == nil {
592+
if strings.TrimSpace(string(data)) == "Y" {
593+
sysfsEnabled = true
594+
}
595+
}
596+
597+
if msrEnabled || sysfsEnabled {
598+
log.Debugf("SEV is enabled (MSR 0xC0010131[0] = %v, /sys/module/kvm_amd/parameters/sev = %v)", msrEnabled, sysfsEnabled)
599+
return true, nil, nil
600+
}
601+
602+
return false, fmt.Errorf("SEV is not enabled (MSR 0xC0010131[0] = %v, /sys/module/kvm_amd/parameters/sev = %v)", msrEnabled, sysfsEnabled), nil
553603
}
554604

555605
// SEVFirmwareVersion validates SEV firmware version
@@ -834,3 +884,40 @@ func TSMEEnabled(hw hwapi.LowLevelHardwareInterfaces, p *PreSet) (bool, error, e
834884
log.Debugf("TSME is enabled (MSR 0xC0010010[18] = 1)")
835885
return true, nil, nil
836886
}
887+
888+
// SEV-ES Tests
889+
func SEVESupport(hw hwapi.LowLevelHardwareInterfaces, p *PreSet) (bool, error, error) {
890+
// Check CPUID
891+
eax, _, _, _ := hw.CPUID(CPUID_SEV_SNP, 0)
892+
cpuidSupported := eax&(1<<3) != 0
893+
894+
// Also check /sys/module/kvm_amd/parameters/sev_es if present
895+
sysfsSupported := false
896+
if data, err := os.ReadFile("/sys/module/kvm_amd/parameters/sev_es"); err == nil {
897+
if strings.TrimSpace(string(data)) == "Y" {
898+
sysfsSupported = true
899+
}
900+
}
901+
902+
if cpuidSupported || sysfsSupported {
903+
log.Debugf("SEV-ES is supported (CPUID.0x8000001F[EAX].bit[3] = %v, /sys/module/kvm_amd/parameters/sev_es = %v)", cpuidSupported, sysfsSupported)
904+
return true, nil, nil
905+
}
906+
return false, fmt.Errorf("SEV-ES is not supported (CPUID.0x8000001F[EAX].bit[3] = %v, /sys/module/kvm_amd/parameters/sev_es = %v)", cpuidSupported, sysfsSupported), nil
907+
}
908+
909+
// SEVESEnabled checks if SEV-ES is enabled by reading MSR 0xC0010131[1]
910+
func SEVESEnabled(hw hwapi.LowLevelHardwareInterfaces, p *PreSet) (bool, error, error) {
911+
const MSR_AMD64_SEV = 0xC0010131
912+
const MSR_AMD64_SEV_ES_ENABLED = uint64(1) << 1 // Bit 1: SEV-ES Enable
913+
vals := hw.ReadMSR(MSR_AMD64_SEV)
914+
if len(vals) == 0 {
915+
return false, fmt.Errorf("ReadMSR returned no values for SEV MSR"), nil
916+
}
917+
val := vals[0]
918+
if val&MSR_AMD64_SEV_ES_ENABLED == 0 {
919+
return false, fmt.Errorf("SEV-ES is not enabled (MSR 0xC0010131[1] = 0)"), nil
920+
}
921+
log.Debugf("SEV-ES is enabled (MSR 0xC0010131[1] = 1)")
922+
return true, nil, nil
923+
}

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