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riscv, gdbstub.c: fix reg_width in ricsv_gen_dynamic_vector_feature()
Commit 33a2491 changed 'reg_width' to use 'vlenb', i.e. vector length
in bytes, when in this context we want 'reg_width' as the length in
bits.
Fix 'reg_width' back to the value in bits like 7cb5992
("target/riscv/gdbstub.c: use 'vlenb' instead of shifting 'vlen'") set
beforehand.
While we're at it, rename 'reg_width' to 'bitsize' to provide a bit more
clarity about what the variable represents. 'bitsize' is also used in
riscv_gen_dynamic_csr_feature() with the same purpose, i.e. as an input to
gdb_feature_builder_append_reg().
Cc: Akihiko Odaki <[email protected]>
Cc: Alex Bennée <[email protected]>
Reported-by: Robin Dapp <[email protected]>
Fixes: 33a2491 ("target/riscv: Use GDBFeature for dynamic XML")
Signed-off-by: Daniel Henrique Barboza <[email protected]>
Reviewed-by: LIU Zhiwei <[email protected]>
Acked-by: Alex Bennée <[email protected]>
Reviewed-by: Akihiko Odaki <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
Cc: qemu-stable <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Alistair Francis <[email protected]>
(cherry picked from commit 583edc4)
Signed-off-by: Michael Tokarev <[email protected]>
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