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target/arm: Move arm_cpu_data_is_big_endian() etc to internals.h
The arm_cpu_data_is_big_endian() and related functions are now used only in target/arm; they can be moved to internals.h. The motivation here is that we would like to move arm_current_el() to internals.h. Signed-off-by: Peter Maydell <[email protected]> Reviewed-by: Richard Henderson <[email protected]>
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target/arm/cpu.h

Lines changed: 0 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -3032,47 +3032,6 @@ static inline bool arm_sctlr_b(CPUARMState *env)
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uint64_t arm_sctlr(CPUARMState *env, int el);
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static inline bool arm_cpu_data_is_big_endian_a32(CPUARMState *env,
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bool sctlr_b)
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{
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#ifdef CONFIG_USER_ONLY
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/*
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* In system mode, BE32 is modelled in line with the
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* architecture (as word-invariant big-endianness), where loads
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* and stores are done little endian but from addresses which
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* are adjusted by XORing with the appropriate constant. So the
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* endianness to use for the raw data access is not affected by
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* SCTLR.B.
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* In user mode, however, we model BE32 as byte-invariant
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* big-endianness (because user-only code cannot tell the
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* difference), and so we need to use a data access endianness
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* that depends on SCTLR.B.
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*/
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if (sctlr_b) {
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return true;
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}
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#endif
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/* In 32bit endianness is determined by looking at CPSR's E bit */
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return env->uncached_cpsr & CPSR_E;
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}
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static inline bool arm_cpu_data_is_big_endian_a64(int el, uint64_t sctlr)
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{
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return sctlr & (el ? SCTLR_EE : SCTLR_E0E);
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}
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/* Return true if the processor is in big-endian mode. */
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static inline bool arm_cpu_data_is_big_endian(CPUARMState *env)
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{
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if (!is_a64(env)) {
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return arm_cpu_data_is_big_endian_a32(env, arm_sctlr_b(env));
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} else {
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int cur_el = arm_current_el(env);
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uint64_t sctlr = arm_sctlr(env, cur_el);
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return arm_cpu_data_is_big_endian_a64(cur_el, sctlr);
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}
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}
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#include "exec/cpu-all.h"
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/*
@@ -3258,13 +3217,6 @@ static inline bool bswap_code(bool sctlr_b)
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#endif
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}
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#ifdef CONFIG_USER_ONLY
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static inline bool arm_cpu_bswap_data(CPUARMState *env)
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{
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return TARGET_BIG_ENDIAN ^ arm_cpu_data_is_big_endian(env);
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}
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#endif
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void cpu_get_tb_cpu_state(CPUARMState *env, vaddr *pc,
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uint64_t *cs_base, uint32_t *flags);
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target/arm/internals.h

Lines changed: 48 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -392,6 +392,54 @@ static inline FloatRoundMode arm_rmode_to_sf(ARMFPRounding rmode)
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return arm_rmode_to_sf_map[rmode];
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}
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static inline bool arm_cpu_data_is_big_endian_a32(CPUARMState *env,
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bool sctlr_b)
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{
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#ifdef CONFIG_USER_ONLY
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/*
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* In system mode, BE32 is modelled in line with the
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* architecture (as word-invariant big-endianness), where loads
402+
* and stores are done little endian but from addresses which
403+
* are adjusted by XORing with the appropriate constant. So the
404+
* endianness to use for the raw data access is not affected by
405+
* SCTLR.B.
406+
* In user mode, however, we model BE32 as byte-invariant
407+
* big-endianness (because user-only code cannot tell the
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* difference), and so we need to use a data access endianness
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* that depends on SCTLR.B.
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*/
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if (sctlr_b) {
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return true;
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}
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#endif
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/* In 32bit endianness is determined by looking at CPSR's E bit */
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return env->uncached_cpsr & CPSR_E;
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}
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419+
static inline bool arm_cpu_data_is_big_endian_a64(int el, uint64_t sctlr)
420+
{
421+
return sctlr & (el ? SCTLR_EE : SCTLR_E0E);
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}
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424+
/* Return true if the processor is in big-endian mode. */
425+
static inline bool arm_cpu_data_is_big_endian(CPUARMState *env)
426+
{
427+
if (!is_a64(env)) {
428+
return arm_cpu_data_is_big_endian_a32(env, arm_sctlr_b(env));
429+
} else {
430+
int cur_el = arm_current_el(env);
431+
uint64_t sctlr = arm_sctlr(env, cur_el);
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return arm_cpu_data_is_big_endian_a64(cur_el, sctlr);
433+
}
434+
}
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436+
#ifdef CONFIG_USER_ONLY
437+
static inline bool arm_cpu_bswap_data(CPUARMState *env)
438+
{
439+
return TARGET_BIG_ENDIAN ^ arm_cpu_data_is_big_endian(env);
440+
}
441+
#endif
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395443
static inline void aarch64_save_sp(CPUARMState *env, int el)
396444
{
397445
if (env->pstate & PSTATE_SP) {

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