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test
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‎Backend/test3.py‎

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import re
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# Read input from text file
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with open('question_papers/cluster_questions.txt', 'r') as file:
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text = file.read()
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# Extract module numbers and questions
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module_questions = {}
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current_module = None
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lines = text.split('\n')
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for line in lines:
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if line.startswith('Module'):
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current_module = re.findall(r'\d+', line)[0]
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module_questions[current_module] = []
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elif line.strip().startswith('-'):
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question = line.strip()[1:].strip()
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question = re.sub(r'(\.\s+)', '. ', question)
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module_questions[current_module].append(question)
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# Save module questions to a file
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with open('question_papers/module_questions.txt', 'w') as file:
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for module, questions in module_questions.items():
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file.write(f"Module {module}:\n")
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for question in questions:
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file.write(f"- {question}\n")
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print("Module questions saved to 'module_questions.txt' file.")

‎Backend/test4.py‎

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import re
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# Read input from text file
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with open('question_papers/cluster_questions.txt', 'r') as file:
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text = file.read()
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# Remove old numbering and add decimal numbering
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lines = text.split('\n')
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module_questions = {}
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current_module = None
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question_number = 1
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for line in lines:
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if line.startswith('Module'):
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current_module = re.findall(r'\d+', line)[0]
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module_questions[current_module] = []
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question_number = 1
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elif line.strip().startswith('-'):
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question = line.strip()[1:].strip()
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if question.startswith('('):
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question = question[1:].strip()
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question = re.sub(r'^[IVX]+\.?\s*', str(question_number) + '. ', question)
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module_questions[current_module].append(question)
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question_number += 1
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# Save module questions to a file
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with open('module_questions.txt', 'w') as file:
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for module, questions in module_questions.items():
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file.write(f"Module {module}:\n")
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for question in questions:
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file.write(f"{question}\n")
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print("Module questions saved to 'module_questions.txt' file.")

‎Backend/test5.py‎

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import torch
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from transformers import GPT2LMHeadModel, GPT2Tokenizer
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# Load the pre-trained model and tokenizer
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model_name = 'gpt2'
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model = GPT2LMHeadModel.from_pretrained(model_name)
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tokenizer = GPT2Tokenizer.from_pretrained(model_name)
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def generate_model_questions(input_questions, num_questions=1):
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# Encode input questions
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input_ids = tokenizer.encode(input_questions, return_tensors='pt')
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# Generate model questions
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max_length = 512 # Adjust the maximum length of the generated questions
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temperature = 1.0 # Adjust the temperature for controlling randomness
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model_questions = []
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for _ in range(num_questions):
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outputs = model.generate(
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input_ids,
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max_length=max_length,
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num_return_sequences=1,
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temperature=temperature,
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repetition_penalty=1.0,
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pad_token_id=tokenizer.eos_token_id,
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early_stopping=True
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)
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# Decode the generated model question
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model_question = tokenizer.decode(outputs[0], skip_special_tokens=True)
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model_questions.append(model_question)
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return model_questions
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# Example usage
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input_questions = """1. Explain the design procedure of combinational circuit with an example
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2. Implement the following function using a multiplexer
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3. Compare TTL and CMOS logic families.
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4. Implement the following Boolean function with NAND gates: OR
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5. Implement the following function using a multiplexer (Use B as input)"""
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model_questions = generate_model_questions(input_questions)
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print("Input Question:")
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print(input_questions)
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print("\nModel Questions:")
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for i, question in enumerate(model_questions, 1):
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print(f"{i}. {question}")

‎module_questions.txt‎

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Module 1:
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1. (a) Convert (63.25) 10 to Hexa decimal and octal.
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2. (a) Perform the following number conversions:
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3. (a) Convert (AB2)16 to octal.
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4. (a) (
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5. (a) Perform the following:
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6. (a) Given the two binary numbers X = 1010100 and Y = 1000011, perform the
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Module 2:
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1. Explain the design procedure of combinational circuit with an example
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2. Implement the following function using a multiplexer
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3. Compare TTL and CMOS logic families.
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4. Implement the following Boolean function with NAND gates: OR
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5. Implement the following function using a multiplexer (Use B as input).
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6. Explain the operation of 2 input CMOS NOR gate and CMOS inverter in
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7. Explain with circuit diagram a typical 2 input TTL NAND gate.
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8. (a) Explain the working of a 4-bit BCD adder with block diagram (7)
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9. (a) Explain the working of a 4-bit magnitude comparator. (5)
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10. (a) Explain the working of SR latch with NAND gate with the help of logic diagram (6)
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11. (a) Design a combinational circuit using a ROM.The circuit accepts three bit (6)
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12. Explain the working of RTL and DTL circuit. Explain how fan-out of DTL gate (10)
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13. (a) Explain the working of Decimal adder with block diagram and explain the (5)
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14. (5)
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15. (a) Explain the working of SR latch using NOR gate with the help of logic (6)
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16. (a) Draw and explain the working of Basic RTL NOR gate. (5)
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17. (a) Design a PLA circuit to implement the functions (6)
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18. (a) Draw circuit of an TTL NAND gate and explain the operation. (7)
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Module 3:
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1. Design and explain a 4 bit asynchronous up-down binary counter.
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2. Write short notes on (1) Fan in and Fan out (ii) Propogation delay
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3. Derive the expressions for a 4-bit magnitude comparator and implement it
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4. (a) Design a decimal adder using 4-bit binary parallel adders.
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5. Design a 4-bit Johnson counter. How does it differ from a ring counter?
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6. Design a 4-bit binary ripple counter using JK flip flops.
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7. Design a RAM consisting of four words of four bits each. Also show the
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8. Design a 4 bit binary ripple counter using JK flip flops. OR
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9. Design a counter that has repeated sequence of six states 0,1,2,4,5,6 using JK OR (10)
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10. (a) Design a 2 bit synchronous up counter using .1K flipflops. (5)
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11. Differentiate PLA and PAL. Draw the PLA for functions: (10)
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12. (a) What is Carry Propagation delay? Design a 4- bit binary parallel adder (6)
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13. (a) Design a synchronous counter using .T flip-flops which counts the (6)
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14. (a) Draw the logic diagram of a four-bit binary ripple counter. Show that a (6)
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Module 4:
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1. Simplify the following Boolean function into (1) sum-of-products form
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2. Prove the theorems of Boolean algebra by using postulates.
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3. Simplify the following function using Quine McCluskey method.
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4. Simplify the following Boolean function into (i) sum-of-products form and
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5. (a) Using 10's complement, subtract 3250-72532. (2)
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6. (a) Simplify the followng Boolean functions using K-map (5)
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7. (a) What is a gray code? What are the advantages of gray code? Find the gray (3)
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8. Simplify the following Boolean function using the tabulation method.
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9. (a) Simplify the following Boolean function into (6)
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10. (a) Implement the following four Boolean expressions with three half adders: (6)

‎question_papers/cluster_questions.txt‎

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Module 1:
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- I. (a) Convert (63.25) 10 to Hexa decimal and octal.
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- I. (a) Perform the following number conversions:
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- I. (a) Convert (AB2)16 to octal.
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- I. (a) (
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- I. (a) Perform the following:
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- I. (a) Given the two binary numbers X = 1010100 and Y = 1000011, perform the
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Module 2:
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- IV. Explain the design procedure of combinational circuit with an example
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- V. Implement the following function using a multiplexer
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- IX. Compare TTL and CMOS logic families.
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- V. Implement the following Boolean function with NAND gates: OR
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- VI. Implement the following function using a multiplexer (Use B as input).
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- VIII. Explain the operation of 2 input CMOS NOR gate and CMOS inverter in
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- IX. Explain with circuit diagram a typical 2 input TTL NAND gate.
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- IV. (a) Explain the working of a 4-bit BCD adder with block diagram (7)
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- V. (a) Explain the working of a 4-bit magnitude comparator. (5)
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- VI. (a) Explain the working of SR latch with NAND gate with the help of logic diagram (6)
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- VIII. (a) Design a combinational circuit using a ROM.The circuit accepts three bit (6)
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- IX. Explain the working of RTL and DTL circuit. Explain how fan-out of DTL gate (10)
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- V. (a) Explain the working of Decimal adder with block diagram and explain the (5)
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- X. (5)
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- VI. (a) Explain the working of SR latch using NOR gate with the help of logic (6)
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- IX. (a) Draw and explain the working of Basic RTL NOR gate. (5)
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- VIII. (a) Design a PLA circuit to implement the functions (6)
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- IX. (a) Draw circuit of an TTL NAND gate and explain the operation. (7)
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Module 3:
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- VII. Design and explain a 4 bit asynchronous up-down binary counter.
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- VIII. Write short notes on (1) Fan in and Fan out (ii) Propogation delay
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- IV. Derive the expressions for a 4-bit magnitude comparator and implement it
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- V. (a) Design a decimal adder using 4-bit binary parallel adders.
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- VI. Design a 4-bit Johnson counter. How does it differ from a ring counter?
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- VII. Design a 4-bit binary ripple counter using JK flip flops.
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- VIII. Design a RAM consisting of four words of four bits each. Also show the
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- VII. Design a 4 bit binary ripple counter using JK flip flops. OR
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- VII. Design a counter that has repeated sequence of six states 0,1,2,4,5,6 using JK OR (10)
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- VII. (a) Design a 2 bit synchronous up counter using .1K flipflops. (5)
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- VIII. Differentiate PLA and PAL. Draw the PLA for functions: (10)
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- V. (a) What is Carry Propagation delay? Design a 4- bit binary parallel adder (6)
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- VI. (a) Design a synchronous counter using .T flip-flops which counts the (6)
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- VII. (a) Draw the logic diagram of a four-bit binary ripple counter. Show that a (6)
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Module 4:
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- II. Simplify the following Boolean function into (1) sum-of-products form
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- III. Prove the theorems of Boolean algebra by using postulates.
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- II. Simplify the following function using Quine McCluskey method.
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- IV. Simplify the following Boolean function into (i) sum-of-products form and
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- II. (a) Using 10's complement, subtract 3250-72532. (2)
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- III. (a) Simplify the followng Boolean functions using K-map (5)
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- II. (a) What is a gray code? What are the advantages of gray code? Find the gray (3)
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- III. Simplify the following Boolean function using the tabulation method.
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- III. (a) Simplify the following Boolean function into (6)
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- IV. (a) Implement the following four Boolean expressions with three half adders: (6)
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‎question_papers/module_questions.txt‎

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Module 1:
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- I. (a) Convert (63.25) 10 to Hexa decimal and octal.
3+
- I. (a) Perform the following number conversions:
4+
- I. (a) Convert (AB2)16 to octal.
5+
- I. (a) (
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- I. (a) Perform the following:
7+
- I. (a) Given the two binary numbers X = 1010100 and Y = 1000011, perform the
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Module 2:
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- IV. Explain the design procedure of combinational circuit with an example
10+
- V. Implement the following function using a multiplexer
11+
- IX. Compare TTL and CMOS logic families.
12+
- V. Implement the following Boolean function with NAND gates: OR
13+
- VI. Implement the following function using a multiplexer (Use B as input).
14+
- VIII. Explain the operation of 2 input CMOS NOR gate and CMOS inverter in
15+
- IX. Explain with circuit diagram a typical 2 input TTL NAND gate.
16+
- IV. (a) Explain the working of a 4-bit BCD adder with block diagram (7)
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- V. (a) Explain the working of a 4-bit magnitude comparator. (5)
18+
- VI. (a) Explain the working of SR latch with NAND gate with the help of logic diagram (6)
19+
- VIII. (a) Design a combinational circuit using a ROM.The circuit accepts three bit (6)
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- IX. Explain the working of RTL and DTL circuit. Explain how fan-out of DTL gate (10)
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- V. (a) Explain the working of Decimal adder with block diagram and explain the (5)
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- X. (5)
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- VI. (a) Explain the working of SR latch using NOR gate with the help of logic (6)
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- IX. (a) Draw and explain the working of Basic RTL NOR gate. (5)
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- VIII. (a) Design a PLA circuit to implement the functions (6)
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- IX. (a) Draw circuit of an TTL NAND gate and explain the operation. (7)
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Module 3:
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- VII. Design and explain a 4 bit asynchronous up-down binary counter.
29+
- VIII. Write short notes on (1) Fan in and Fan out (ii) Propogation delay
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- IV. Derive the expressions for a 4-bit magnitude comparator and implement it
31+
- V. (a) Design a decimal adder using 4-bit binary parallel adders.
32+
- VI. Design a 4-bit Johnson counter. How does it differ from a ring counter?
33+
- VII. Design a 4-bit binary ripple counter using JK flip flops.
34+
- VIII. Design a RAM consisting of four words of four bits each. Also show the
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- VII. Design a 4 bit binary ripple counter using JK flip flops. OR
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- VII. Design a counter that has repeated sequence of six states 0,1,2,4,5,6 using JK OR (10)
37+
- VII. (a) Design a 2 bit synchronous up counter using .1K flipflops. (5)
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- VIII. Differentiate PLA and PAL. Draw the PLA for functions: (10)
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- V. (a) What is Carry Propagation delay? Design a 4- bit binary parallel adder (6)
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- VI. (a) Design a synchronous counter using .T flip-flops which counts the (6)
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- VII. (a) Draw the logic diagram of a four-bit binary ripple counter. Show that a (6)
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Module 4:
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- II. Simplify the following Boolean function into (1) sum-of-products form
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- III. Prove the theorems of Boolean algebra by using postulates.
45+
- II. Simplify the following function using Quine McCluskey method.
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- IV. Simplify the following Boolean function into (i) sum-of-products form and
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- II. (a) Using 10's complement, subtract 3250-72532. (2)
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- III. (a) Simplify the followng Boolean functions using K-map (5)
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- II. (a) What is a gray code? What are the advantages of gray code? Find the gray (3)
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- III. Simplify the following Boolean function using the tabulation method.
51+
- III. (a) Simplify the following Boolean function into (6)
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- IV. (a) Implement the following four Boolean expressions with three half adders: (6)

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