feat: add profiling tracepoints to CPU runtime function implementations (Part 7)

Instrument key CPU runtime functions entry points in src/runtime/NEON/functions/* with
tracepoints to enable lightweight runtime profiling. These tracepoints
leverage the ACL_PROFILE macros and form the basis for collecting
execution timing and behavior metrics. This is the first step in
integrating end-to-end profiling support.

Partially Resolves: COMPMID-8330
Signed-off-by: Walid Ben Romdhane <[email protected]>
Change-Id: I6c3c262f1f7c31bb4e55a2ab0659234d4d4b87de
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/14779
Reviewed-by: Andreas Flöjt <[email protected]>
Benchmark: Arm Jenkins <[email protected]>
Tested-by: Arm Jenkins <[email protected]>
Comments-Addressed: Arm Jenkins <[email protected]>

Author: walidbr

src/runtime/NEON/functions/NEActivationLayer.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2021, 2024 Arm Limited.
+ * Copyright (c) 2017-2021, 2024-2025 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -25,6 +25,7 @@
 
 #include "arm_compute/core/Validate.h"
 
+#include "src/common/utils/profile/acl_profile.h"
 #include "src/cpu/operators/CpuActivation.h"
 
 namespace arm_compute
@@ -47,6 +48,7 @@ NEActivationLayer::~NEActivationLayer()                               = default;
 
 void NEActivationLayer::configure(ITensor *input, ITensor *output, ActivationLayerInfo activation_info)
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEActivationLayer::configure");
     _impl->src = input;
     _impl->dst = output == nullptr ? input : output;
 
@@ -59,12 +61,14 @@ void NEActivationLayer::configure(ITensor *input, ITensor *output, ActivationLay
 Status
 NEActivationLayer::validate(const ITensorInfo *input, const ITensorInfo *output, const ActivationLayerInfo &act_info)
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEActivationLayer::validate");
     ARM_COMPUTE_RETURN_ERROR_ON_DYNAMIC_SHAPE(input, output);
     return cpu::CpuActivation::validate(input, output, act_info);
 }
 
 void NEActivationLayer::run()
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEActivationLayer::run");
     ITensorPack pack;
     pack.add_tensor(TensorType::ACL_SRC, _impl->src);
     pack.add_tensor(TensorType::ACL_DST, _impl->dst);

src/runtime/NEON/functions/NEAddMulAdd.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2023-2024 Arm Limited.
+ * Copyright (c) 2023-2025 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -27,6 +27,7 @@
 #include "arm_compute/runtime/Tensor.h"
 
 #include "src/common/utils/Log.h"
+#include "src/common/utils/profile/acl_profile.h"
 #include "src/core/helpers/MemoryHelpers.h"
 #include "src/cpu/operators/CpuAddMulAdd.h"
 
@@ -56,6 +57,7 @@ void NEAddMulAdd::configure(ITensor                   *input1,
                             const ConvertPolicy        policy,
                             const ActivationLayerInfo &act_info)
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEAddMulAdd::configure");
     ARM_COMPUTE_LOG_PARAMS(input1, input2, bn_mul, bn_add, add_output, final_output, policy, act_info);
 
     _impl->op = std::make_unique<cpu::CpuAddMulAdd>();
@@ -79,12 +81,14 @@ Status NEAddMulAdd::validate(const ITensorInfo         *input1,
                              ConvertPolicy              policy,
                              const ActivationLayerInfo &act_info)
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEAddMulAdd::validate");
     ARM_COMPUTE_RETURN_ERROR_ON_DYNAMIC_SHAPE(input1, input2, bn_mul, bn_add, add_output, final_output);
     return cpu::CpuAddMulAdd::validate(input1, input2, bn_mul, bn_add, add_output, final_output, policy, act_info);
 }
 
 void NEAddMulAdd::run()
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEAddMulAdd::run");
     _impl->op->run(_impl->run_pack);
 }
 } // namespace arm_compute

src/runtime/NEON/functions/NEArgMinMaxLayer.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2021, 2023-2024 Arm Limited.
+ * Copyright (c) 2018-2021, 2023-2025 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -34,6 +34,7 @@
 #include "arm_compute/runtime/Tensor.h"
 
 #include "src/common/utils/Log.h"
+#include "src/common/utils/profile/acl_profile.h"
 #include "src/core/NEON/kernels/NEReductionOperationKernel.h"
 
 namespace arm_compute
@@ -56,6 +57,7 @@ NEArgMinMaxLayer::NEArgMinMaxLayer(std::shared_ptr<IMemoryManager> memory_manage
 
 void NEArgMinMaxLayer::configure(ITensor *input, int axis, ITensor *output, const ReductionOperation &op)
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEArgMinMaxLayer::configure");
     ARM_COMPUTE_LOG_PARAMS(input, axis, output, op);
     _impl->reduction_function = std::make_unique<NEReductionOperation>();
     if (output->info() &&
@@ -78,6 +80,7 @@ void NEArgMinMaxLayer::configure(ITensor *input, int axis, ITensor *output, cons
 Status
 NEArgMinMaxLayer::validate(const ITensorInfo *input, int axis, const ITensorInfo *output, const ReductionOperation &op)
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEArgMinMaxLayer::validate");
     ARM_COMPUTE_RETURN_ERROR_ON_DYNAMIC_SHAPE(input, output);
     ARM_COMPUTE_RETURN_ERROR_ON_MSG(op != ReductionOperation::ARG_IDX_MAX && op != ReductionOperation::ARG_IDX_MIN,
                                     "Invalid operation");
@@ -86,6 +89,7 @@ NEArgMinMaxLayer::validate(const ITensorInfo *input, int axis, const ITensorInfo
 
 void NEArgMinMaxLayer::run()
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEArgMinMaxLayer::run");
     MemoryGroupResourceScope scope_mg(_impl->memory_group);
     _impl->reduction_function->run();
     if (_impl->tmp_reduction_result != nullptr)

src/runtime/NEON/functions/NEArithmeticAddition.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2021, 2024 Arm Limited.
+ * Copyright (c) 2017-2021, 2024-2025 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -25,6 +25,7 @@
 
 #include "arm_compute/core/Validate.h"
 
+#include "src/common/utils/profile/acl_profile.h"
 #include "src/cpu/operators/CpuAdd.h"
 
 #include <utility>
@@ -52,6 +53,7 @@ Status NEArithmeticAddition::validate(const ITensorInfo         *input1,
                                       ConvertPolicy              policy,
                                       const ActivationLayerInfo &act_info)
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEArithmeticAddition::validate");
     ARM_COMPUTE_RETURN_ERROR_ON_DYNAMIC_SHAPE(input1, input2, output);
     return cpu::CpuAdd::validate(input1, input2, output, policy, act_info);
 }
@@ -62,6 +64,7 @@ void NEArithmeticAddition::configure(const ITensor             *input1,
                                      ConvertPolicy              policy,
                                      const ActivationLayerInfo &act_info)
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEArithmeticAddition::configure");
     _impl->src_0 = input1;
     _impl->src_1 = input2;
     _impl->dst   = output;
@@ -71,6 +74,7 @@ void NEArithmeticAddition::configure(const ITensor             *input1,
 
 void NEArithmeticAddition::run()
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEArithmeticAddition::run");
     ITensorPack pack;
     pack.add_tensor(TensorType::ACL_SRC_0, _impl->src_0);
     pack.add_tensor(TensorType::ACL_SRC_1, _impl->src_1);

src/runtime/NEON/functions/NEArithmeticSubtraction.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2021, 2024 Arm Limited.
+ * Copyright (c) 2017-2021, 2024-2025 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -26,6 +26,7 @@
 #include "arm_compute/core/ITensor.h"
 #include "arm_compute/core/Validate.h"
 
+#include "src/common/utils/profile/acl_profile.h"
 #include "src/cpu/operators/CpuSub.h"
 
 #include <utility>
@@ -53,6 +54,7 @@ Status NEArithmeticSubtraction::validate(const ITensorInfo         *input1,
                                          ConvertPolicy              policy,
                                          const ActivationLayerInfo &act_info)
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEArithmeticSubtraction::validate");
     ARM_COMPUTE_RETURN_ERROR_ON_DYNAMIC_SHAPE(input1, input2, output);
     return cpu::CpuSub::validate(input1, input2, output, policy, act_info);
 }
@@ -63,6 +65,7 @@ void NEArithmeticSubtraction::configure(const ITensor             *input1,
                                         ConvertPolicy              policy,
                                         const ActivationLayerInfo &act_info)
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEArithmeticSubtraction::configure");
     _impl->src_0 = input1;
     _impl->src_1 = input2;
     _impl->dst   = output;
@@ -72,6 +75,7 @@ void NEArithmeticSubtraction::configure(const ITensor             *input1,
 
 void NEArithmeticSubtraction::run()
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEArithmeticSubtraction::run");
     ITensorPack pack;
     pack.add_tensor(TensorType::ACL_SRC_0, _impl->src_0);
     pack.add_tensor(TensorType::ACL_SRC_1, _impl->src_1);

src/runtime/NEON/functions/NEBatchNormalizationLayer.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2021, 2024 Arm Limited.
+ * Copyright (c) 2017-2021, 2024-2025 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -31,6 +31,7 @@
 #include "arm_compute/runtime/NEON/NEScheduler.h"
 
 #include "src/common/utils/Log.h"
+#include "src/common/utils/profile/acl_profile.h"
 #include "src/core/NEON/kernels/NEBatchNormalizationLayerKernel.h"
 
 namespace arm_compute
@@ -50,6 +51,7 @@ void NEBatchNormalizationLayer::configure(ITensor            *input,
                                           float               epsilon,
                                           ActivationLayerInfo act_info)
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEBatchNormalizationLayer::configure");
     ARM_COMPUTE_LOG_PARAMS(input, output, mean, var, beta, gamma, epsilon, act_info);
     // Configure kernel
     _norm_kernel = std::make_unique<NEBatchNormalizationLayerKernel>();
@@ -65,6 +67,7 @@ Status NEBatchNormalizationLayer::validate(const ITensorInfo  *input,
                                            float               epsilon,
                                            ActivationLayerInfo act_info)
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEBatchNormalizationLayer::validate");
     ARM_COMPUTE_RETURN_ERROR_ON_DYNAMIC_SHAPE(input, output, mean, var, beta, gamma);
     ARM_COMPUTE_RETURN_ON_ERROR(
         NEBatchNormalizationLayerKernel::validate(input, output, mean, var, beta, gamma, epsilon, act_info));
@@ -73,6 +76,7 @@ Status NEBatchNormalizationLayer::validate(const ITensorInfo  *input,
 
 void NEBatchNormalizationLayer::run()
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEBatchNormalizationLayer::run");
     NEScheduler::get().schedule(_norm_kernel.get(), Window::DimY);
 }
 } // namespace arm_compute

src/runtime/NEON/functions/NEBatchToSpaceLayer.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019-2021, 2023-2024 Arm Limited.
+ * Copyright (c) 2019-2021, 2023-2025 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -30,12 +30,14 @@
 #include "arm_compute/core/Validate.h"
 
 #include "src/common/utils/Log.h"
+#include "src/common/utils/profile/acl_profile.h"
 #include "src/core/NEON/kernels/NEBatchToSpaceLayerKernel.h"
 
 namespace arm_compute
 {
 void NEBatchToSpaceLayer::configure(const ITensor *input, const ITensor *block_shape, ITensor *output)
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEBatchToSpaceLayer::configure");
     ARM_COMPUTE_LOG_PARAMS(input, block_shape, output);
     auto k = std::make_unique<NEBatchToSpaceLayerKernel>();
     k->configure(input, block_shape, output);
@@ -45,6 +47,7 @@ void NEBatchToSpaceLayer::configure(const ITensor *input, const ITensor *block_s
 void NEBatchToSpaceLayer::configure(
     const ITensor *input, int32_t block_shape_x, int32_t block_shape_y, ITensor *output, const CropInfo &crop_info)
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEBatchToSpaceLayer::configure");
     auto k = std::make_unique<NEBatchToSpaceLayerKernel>();
     k->configure(input, block_shape_x, block_shape_y, output, crop_info);
     _kernel = std::move(k);
@@ -53,6 +56,7 @@ void NEBatchToSpaceLayer::configure(
 Status
 NEBatchToSpaceLayer::validate(const ITensorInfo *input, const ITensorInfo *block_shape, const ITensorInfo *output)
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEBatchToSpaceLayer::validate");
     ARM_COMPUTE_RETURN_ERROR_ON_DYNAMIC_SHAPE(input, block_shape, output);
     return NEBatchToSpaceLayerKernel::validate(input, block_shape, output);
 }
@@ -63,6 +67,7 @@ Status NEBatchToSpaceLayer::validate(const ITensorInfo *input,
                                      const ITensorInfo *output,
                                      const CropInfo    &crop_info)
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEBatchToSpaceLayer::validate");
     return NEBatchToSpaceLayerKernel::validate(input, block_shape_x, block_shape_y, output, crop_info);
 }
 } // namespace arm_compute

src/runtime/NEON/functions/NEBitwiseAnd.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2021 Arm Limited.
+ * Copyright (c) 2017-2021, 2025 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -24,6 +24,7 @@
 #include "arm_compute/runtime/NEON/functions/NEBitwiseAnd.h"
 
 #include "src/common/utils/Log.h"
+#include "src/common/utils/profile/acl_profile.h"
 #include "src/core/NEON/kernels/NEBitwiseAndKernel.h"
 
 #include <utility>
@@ -32,6 +33,7 @@ using namespace arm_compute;
 
 void NEBitwiseAnd::configure(const ITensor *input1, const ITensor *input2, ITensor *output)
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEBitwiseAnd::configure");
     ARM_COMPUTE_LOG_PARAMS(input1, input2, output);
     auto k = std::make_unique<NEBitwiseAndKernel>();
     k->configure(input1, input2, output);

src/runtime/NEON/functions/NEBitwiseNot.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2021 Arm Limited.
+ * Copyright (c) 2017-2021, 2025 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -24,6 +24,7 @@
 #include "arm_compute/runtime/NEON/functions/NEBitwiseNot.h"
 
 #include "src/common/utils/Log.h"
+#include "src/common/utils/profile/acl_profile.h"
 #include "src/core/NEON/kernels/NEBitwiseNotKernel.h"
 
 #include <utility>
@@ -32,6 +33,7 @@ using namespace arm_compute;
 
 void NEBitwiseNot::configure(const ITensor *input, ITensor *output)
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEBitwiseNot::configure");
     ARM_COMPUTE_LOG_PARAMS(input, output);
     auto k = std::make_unique<NEBitwiseNotKernel>();
     k->configure(input, output);

src/runtime/NEON/functions/NEBitwiseOr.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2021 Arm Limited.
+ * Copyright (c) 2017-2021, 2025 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -24,6 +24,7 @@
 #include "arm_compute/runtime/NEON/functions/NEBitwiseOr.h"
 
 #include "src/common/utils/Log.h"
+#include "src/common/utils/profile/acl_profile.h"
 #include "src/core/NEON/kernels/NEBitwiseOrKernel.h"
 
 #include <utility>
@@ -32,6 +33,7 @@ using namespace arm_compute;
 
 void NEBitwiseOr::configure(const ITensor *input1, const ITensor *input2, ITensor *output)
 {
+    ARM_COMPUTE_TRACE_EVENT(ARM_COMPUTE_PROF_CAT_CPU, ARM_COMPUTE_PROF_LVL_CPU, "NEBitwiseOr::configure");
     ARM_COMPUTE_LOG_PARAMS(input1, input2, output);
     auto k = std::make_unique<NEBitwiseOrKernel>();
     k->configure(input1, input2, output);