fix: FEAT_SME2 detection in Android(TM) and Linux(R)

Resolves: COMPMID-8648

Change-Id: Iade2a514738b5731e2594056b1de7c259f0128bc
Signed-off-by: Gunes Bayir <[email protected]>

Author: gunes-arm

src/common/cpuinfo/CpuInfo.cpp

@@ -354,8 +354,8 @@ CpuInfo CpuInfo::build()
 {
 #if !defined(_WIN64) && !defined(BARE_METAL) && !defined(__APPLE__) && !defined(__OpenBSD__) && !defined(__QNX__) && \
     (defined(__arm__) || defined(__aarch64__))
-    const uint32_t hwcaps   = getauxval(AT_HWCAP);
-    const uint32_t hwcaps2  = getauxval(AT_HWCAP2);
+    const uint64_t hwcaps   = getauxval(AT_HWCAP);
+    const uint64_t hwcaps2  = getauxval(AT_HWCAP2);
     const uint32_t max_cpus = get_max_cpus();
 
     // Populate midr values

src/common/cpuinfo/CpuIsaInfo.cpp

@@ -45,6 +45,7 @@
 #define ARM_COMPUTE_CPU_FEATURE_HWCAP2_I8MM     (1 << 13)
 #define ARM_COMPUTE_CPU_FEATURE_HWCAP2_BF16     (1 << 14)
 #define ARM_COMPUTE_CPU_FEATURE_HWCAP2_SME      (1 << 23)
+#define ARM_COMPUTE_CPU_FEATURE_HWCAP2_SME2     (1UL << 37)
 
 namespace arm_compute
 {
@@ -58,14 +59,14 @@ inline bool is_feature_supported(uint64_t features, uint64_t feature_mask)
 }
 
 #if defined(__arm__)
-void decode_hwcaps(CpuIsaInfo &isa, const uint32_t hwcaps, const uint32_t hwcaps2)
+void decode_hwcaps(CpuIsaInfo &isa, const uint64_t hwcaps, const uint64_t hwcaps2)
 {
     ARM_COMPUTE_UNUSED(hwcaps2);
     isa.fp16 = false;
     isa.neon = is_feature_supported(hwcaps, ARM_COMPUTE_CPU_FEATURE_HWCAP_NEON);
 }
 #elif defined(__aarch64__)
-void decode_hwcaps(CpuIsaInfo &isa, const uint32_t hwcaps, const uint32_t hwcaps2)
+void decode_hwcaps(CpuIsaInfo &isa, const uint64_t hwcaps, const uint64_t hwcaps2)
 {
     // High-level SIMD support
     isa.neon = is_feature_supported(hwcaps, ARM_COMPUTE_CPU_FEATURE_HWCAP_ASIMD);
@@ -75,7 +76,7 @@ void decode_hwcaps(CpuIsaInfo &isa, const uint32_t hwcaps, const uint32_t hwcaps
 
     // Detection of SME from type HWCAP2 in the auxillary vector
     isa.sme  = is_feature_supported(hwcaps2, ARM_COMPUTE_CPU_FEATURE_HWCAP2_SME);
-    isa.sme2 = isa.sme; // Needs to be set properly
+    isa.sme2 = is_feature_supported(hwcaps2, ARM_COMPUTE_CPU_FEATURE_HWCAP2_SME2);
 
     // Data-type support
     isa.fp16 = is_feature_supported(hwcaps, ARM_COMPUTE_CPU_FEATURE_HWCAP_FPHP | ARM_COMPUTE_CPU_FEATURE_HWCAP_ASIMDHP);
@@ -89,7 +90,7 @@ void decode_hwcaps(CpuIsaInfo &isa, const uint32_t hwcaps, const uint32_t hwcaps
     isa.svef32mm = is_feature_supported(hwcaps2, ARM_COMPUTE_CPU_FEATURE_HWCAP2_SVEF32MM);
 }
 #else  /* defined(__aarch64__) */
-void decode_hwcaps(CpuIsaInfo &isa, const uint32_t hwcaps, const uint32_t hwcaps2)
+void decode_hwcaps(CpuIsaInfo &isa, const uint64_t hwcaps, const uint64_t hwcaps2)
 {
     ARM_COMPUTE_UNUSED(isa, hwcaps, hwcaps2);
 }
@@ -143,7 +144,7 @@ void allowlisted_model_features(CpuIsaInfo &isa, CpuModel model)
 }
 } // namespace
 
-CpuIsaInfo init_cpu_isa_from_hwcaps(uint32_t hwcaps, uint32_t hwcaps2, uint32_t midr)
+CpuIsaInfo init_cpu_isa_from_hwcaps(uint64_t hwcaps, uint64_t hwcaps2, uint32_t midr)
 {
     CpuIsaInfo isa;
 

src/common/cpuinfo/CpuIsaInfo.h

@@ -64,7 +64,7 @@ struct CpuIsaInfo
  *
  * @return CpuIsaInfo A populated ISA feature structure
  */
-CpuIsaInfo init_cpu_isa_from_hwcaps(uint32_t hwcaps, uint32_t hwcaps2, uint32_t midr);
+CpuIsaInfo init_cpu_isa_from_hwcaps(uint64_t hwcaps, uint64_t hwcaps2, uint32_t midr);
 
 /** Identify ISA related information through register information
  *