@@ -23,7 +23,7 @@ index e7ea10ff971a..09ed4ab219a1 100644
2323@@ -30,6 +30,10 @@ cl::opt<TPLoop::MemTransfer> EnableMemtransferTPLoop(
2424 "Allow (may be subject to certain conditions) "
2525 "conversion of memcpy to TP loop.")));
26-
26+
2727+ static cl::opt<bool> EnableInlineMemcpyAsLdSt(
2828+ "enable-inline-memcpy-ld-st", cl::init(false), cl::Hidden,
2929+ cl::desc("Inline memcpy with LD/ST instructions."));
@@ -34,7 +34,7 @@ index e7ea10ff971a..09ed4ab219a1 100644
3434@@ -136,6 +140,118 @@ SDValue ARMSelectionDAGInfo::EmitSpecializedLibcall(
3535 return CallResult.second;
3636 }
37-
37+
3838+ SDValue ARMSelectionDAGInfo::EmitMemcpyAsLdSt(
3939+ SelectionDAG &DAG, SDLoc dl, const ARMSubtarget &Subtarget, SDValue Chain,
4040+ SDValue Dst, SDValue Src, uint64_t SizeVal, bool isVolatile,
@@ -153,7 +153,7 @@ index e7ea10ff971a..09ed4ab219a1 100644
153153@@ -190,6 +306,10 @@ SDValue ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(
154154 return EmitSpecializedLibcall(DAG, dl, Chain, Dst, Src, Size,
155155 Alignment.value(), RTLIB::MEMCPY);
156-
156+
157157+ if (EnableInlineMemcpyAsLdSt && Subtarget.isMClass() && Subtarget.hasV7Ops())
158158+ return EmitMemcpyAsLdSt(DAG, dl, Subtarget, Chain, Dst, Src, SizeVal,
159159+ isVolatile, DstPtrInfo, SrcPtrInfo);
@@ -168,7 +168,7 @@ index 275b1c0f8dc0..6ff422c15b12 100644
168168@@ -44,6 +44,12 @@ public:
169169 MachinePointerInfo DstPtrInfo,
170170 MachinePointerInfo SrcPtrInfo) const override;
171-
171+
172172+ SDValue EmitMemcpyAsLdSt(SelectionDAG &DAG, SDLoc dl,
173173+ const ARMSubtarget &Subtarget, SDValue Chain,
174174+ SDValue Dst, SDValue Src, uint64_t SizeVal,
@@ -345,6 +345,6 @@ index 000000000000..12f74c04087e
345345+ tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %1, i8* %3, i32 28, i32 4, i1 false)
346346+ ret void
347347+ }
348- - -
348+ - -
3493492.34.1
350350
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