From ced8edd57493c7d92e46e7ee25cc17fa4c458ede Mon Sep 17 00:00:00 2001 From: Lucas Prates Date: Fri, 15 Nov 2024 16:29:08 +0000 Subject: [PATCH 1/3] Add aarch64 library variants for no-unaligned-access This introduces new library variants for aarch64 to support targets where unaligned memory accesses are disabled. To enable these changes a patch to picolibc was required, ensuring the assembly implemenation that relies on unaligned accesses is not used when `__ARM_FEATURE_UNALIGNED` is not defined. --- CMakeLists.txt | 23 + .../picolibc/0001-Enable-libcxx-builds.patch | 7 +- .../0002-Add-bootcode-for-AArch64-FVPs.patch | 7 +- ...strict-align-no-unaligned-access-in-.patch | 431 ++++++++++++++++++ 4 files changed, 464 insertions(+), 4 deletions(-) create mode 100644 patches/picolibc/0003-Add-support-for-strict-align-no-unaligned-access-in-.patch diff --git a/CMakeLists.txt b/CMakeLists.txt index 6d1bebc0..6de6cbbe 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -725,6 +725,7 @@ function( default_ram_size default_stack_size run_tests + executor ) if(CMAKE_INSTALL_MESSAGE STREQUAL NEVER) set(MESON_INSTALL_QUIET "--quiet") @@ -758,6 +759,7 @@ function( -Dspecsdir=none -Dmultilib=false -Dtests-enable-stack-protector=false + -Dtest-machine=${executor} -Dtest-long-double=${enable_long_double_test} -Dnewlib-nano-malloc=${newlib_nano_malloc} --prefix @@ -1045,6 +1047,7 @@ macro( default_ram_size default_stack_size run_tests + executor ) # It would be nice to just pass ${ARGN} to both the underlying functions, # but that has the side effect of expanding any list arguments (e.g. @@ -1067,6 +1070,7 @@ macro( "${default_ram_size}" "${default_stack_size}" "${run_tests}" + "${executor}" ) elseif(LLVM_TOOLCHAIN_C_LIBRARY STREQUAL newlib) add_newlib( @@ -1458,6 +1462,7 @@ function(add_library_variant target_arch) set(have_executor FALSE) endif() else() + set(VARIANT_EXECUTOR "qemu") get_qemu_params( "${target_triple}" "${VARIANT_QEMU_MACHINE}" @@ -1488,6 +1493,7 @@ function(add_library_variant target_arch) "${VARIANT_RAM_SIZE}" "${VARIANT_STACK_SIZE}" "${have_executor}" + "${VARIANT_EXECUTOR}" ) add_compiler_rt( "${directory}" @@ -1649,6 +1655,23 @@ add_library_variants_for_cpu( RAM_SIZE 0x1000000 STACK_SIZE 8K ) +add_library_variants_for_cpu( + aarch64a + SUFFIX strict_align + COMPILE_FLAGS "-march=armv8-a -mno-unaligned-access" + MULTILIB_FLAGS "--target=aarch64-unknown-none-elf -mno-unaligned-access" + PICOLIBC_BUILD_TYPE "release" + EXECUTOR fvp + FVP_MODEL aem-a + FVP_CONFIG "v8a-aarch64" + BOOT_FLASH_ADDRESS 0x80000000 + BOOT_FLASH_SIZE 0x1000 + FLASH_ADDRESS 0x80001000 + FLASH_SIZE 0xfff000 + RAM_ADDRESS 0x81000000 + RAM_SIZE 0x1000000 + STACK_SIZE 8K +) # For AArch32, clang uses different defaults for FPU selection than GCC, both # when "+fp" or "+fp.dp" are used and when no FPU specifier is provided in # "-march=". Using "-mfpu=" explicitly. diff --git a/patches/picolibc/0001-Enable-libcxx-builds.patch b/patches/picolibc/0001-Enable-libcxx-builds.patch index 4ff07a16..7960ca12 100644 --- a/patches/picolibc/0001-Enable-libcxx-builds.patch +++ b/patches/picolibc/0001-Enable-libcxx-builds.patch @@ -1,7 +1,7 @@ -From 42f07bef7775a1387f9707e959f8b6782f9d6808 Mon Sep 17 00:00:00 2001 +From 028fe75e045951a9d091008a85971523358160db Mon Sep 17 00:00:00 2001 From: Simi Pallipurath Date: Thu, 14 Nov 2024 10:07:08 +0000 -Subject: [PATCH 1/2] [PATCH 1/2] Enable libcxx builds +Subject: Enable libcxx builds Modifications to build config and linker script required to enable libc++ builds. @@ -47,3 +47,6 @@ index 7b63ba172..cda5e1e7e 100644 *(.gnu.linkonce.t.*) KEEP (*(.fini .fini.*)) @PREFIX@__text_end = .; +-- +2.39.5 (Apple Git-154) + diff --git a/patches/picolibc/0002-Add-bootcode-for-AArch64-FVPs.patch b/patches/picolibc/0002-Add-bootcode-for-AArch64-FVPs.patch index cde586a3..1c8c2ab2 100644 --- a/patches/picolibc/0002-Add-bootcode-for-AArch64-FVPs.patch +++ b/patches/picolibc/0002-Add-bootcode-for-AArch64-FVPs.patch @@ -1,7 +1,7 @@ -From f2ca20cebc85850a50b80424bb0f81c927edd04b Mon Sep 17 00:00:00 2001 +From 58451642e678817d8822b04b8ff07ee4758a8f10 Mon Sep 17 00:00:00 2001 From: Simi Pallipurath Date: Thu, 14 Nov 2024 10:12:33 +0000 -Subject: [PATCH 2/2] [PATCH 2/2] Add bootcode for AArch64 FVPs +Subject: Add bootcode for AArch64 FVPs The AArch64 FVP (Fixed Virtual Platform) models differ from QEMU in a few ways which affect the crt0 code: @@ -868,3 +868,6 @@ index 76965990f..be8f875be 100644 + endforeach endforeach +-- +2.39.5 (Apple Git-154) + diff --git a/patches/picolibc/0003-Add-support-for-strict-align-no-unaligned-access-in-.patch b/patches/picolibc/0003-Add-support-for-strict-align-no-unaligned-access-in-.patch new file mode 100644 index 00000000..eb366cc6 --- /dev/null +++ b/patches/picolibc/0003-Add-support-for-strict-align-no-unaligned-access-in-.patch @@ -0,0 +1,431 @@ +From 79f3ce1b5f730b0293e8452d4e028e34c0e71736 Mon Sep 17 00:00:00 2001 +From: Lucas Prates +Date: Mon, 11 Nov 2024 16:37:04 +0000 +Subject: Add support for strict-align/no-unaligned-access in AArch64 + +--- + newlib/libc/machine/aarch64/memchr-stub.c | 2 +- + newlib/libc/machine/aarch64/memchr.S | 2 +- + newlib/libc/machine/aarch64/memcmp-stub.c | 2 +- + newlib/libc/machine/aarch64/memcmp.S | 2 +- + newlib/libc/machine/aarch64/memcpy-stub.c | 2 +- + newlib/libc/machine/aarch64/memcpy.S | 2 +- + newlib/libc/machine/aarch64/memmove-stub.c | 2 +- + newlib/libc/machine/aarch64/memrchr-stub.c | 2 +- + newlib/libc/machine/aarch64/memrchr.S | 2 +- + newlib/libc/machine/aarch64/memset-stub.c | 2 +- + newlib/libc/machine/aarch64/memset.S | 2 +- + newlib/libc/machine/aarch64/rawmemchr-stub.c | 2 +- + newlib/libc/machine/aarch64/rawmemchr.S | 2 +- + newlib/libc/machine/aarch64/stpcpy-stub.c | 2 +- + newlib/libc/machine/aarch64/strchr-stub.c | 2 +- + newlib/libc/machine/aarch64/strchr.S | 2 +- + newlib/libc/machine/aarch64/strchrnul-stub.c | 2 +- + newlib/libc/machine/aarch64/strchrnul.S | 2 +- + newlib/libc/machine/aarch64/strcmp-stub.c | 2 +- + newlib/libc/machine/aarch64/strcmp.S | 2 +- + newlib/libc/machine/aarch64/strcpy-stub.c | 2 +- + newlib/libc/machine/aarch64/strcpy.S | 2 +- + newlib/libc/machine/aarch64/strlen-stub.c | 2 +- + newlib/libc/machine/aarch64/strlen.S | 2 +- + newlib/libc/machine/aarch64/strncmp-stub.c | 2 +- + newlib/libc/machine/aarch64/strncmp.S | 2 +- + newlib/libc/machine/aarch64/strnlen-stub.c | 2 +- + newlib/libc/machine/aarch64/strnlen.S | 2 +- + newlib/libc/machine/aarch64/strrchr-stub.c | 2 +- + newlib/libc/machine/aarch64/strrchr.S | 2 +- + 30 files changed, 30 insertions(+), 30 deletions(-) + +diff --git a/newlib/libc/machine/aarch64/memchr-stub.c b/newlib/libc/machine/aarch64/memchr-stub.c +index c887bc62f..735fc9d31 100644 +--- a/newlib/libc/machine/aarch64/memchr-stub.c ++++ b/newlib/libc/machine/aarch64/memchr-stub.c +@@ -26,7 +26,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) || !defined(__ARM_FEATURE_UNALIGNED) + # include "../../string/memchr.c" + #else + /* See memchr.S */ +diff --git a/newlib/libc/machine/aarch64/memchr.S b/newlib/libc/machine/aarch64/memchr.S +index 29fc3c3c8..70686a8da 100644 +--- a/newlib/libc/machine/aarch64/memchr.S ++++ b/newlib/libc/machine/aarch64/memchr.S +@@ -7,7 +7,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) || !defined(__ARM_FEATURE_UNALIGNED) + /* See memchr-stub.c */ + #else + /* Assumptions: +diff --git a/newlib/libc/machine/aarch64/memcmp-stub.c b/newlib/libc/machine/aarch64/memcmp-stub.c +index af0cebf37..11aa224dc 100644 +--- a/newlib/libc/machine/aarch64/memcmp-stub.c ++++ b/newlib/libc/machine/aarch64/memcmp-stub.c +@@ -26,7 +26,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) || !defined(__ARM_FEATURE_UNALIGNED) + # include "../../string/memcmp.c" + #else + /* See memcmp.S */ +diff --git a/newlib/libc/machine/aarch64/memcmp.S b/newlib/libc/machine/aarch64/memcmp.S +index 11352ff21..2c9c8e9e3 100644 +--- a/newlib/libc/machine/aarch64/memcmp.S ++++ b/newlib/libc/machine/aarch64/memcmp.S +@@ -6,7 +6,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) || !defined(__ARM_FEATURE_UNALIGNED) + /* See memcmp-stub.c */ + #else + +diff --git a/newlib/libc/machine/aarch64/memcpy-stub.c b/newlib/libc/machine/aarch64/memcpy-stub.c +index 145f638da..df8bcf588 100644 +--- a/newlib/libc/machine/aarch64/memcpy-stub.c ++++ b/newlib/libc/machine/aarch64/memcpy-stub.c +@@ -26,7 +26,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined (__ARM_FEATURE_UNALIGNED) + # include "../../string/memcpy.c" + #else + /* See memcpy.S */ +diff --git a/newlib/libc/machine/aarch64/memcpy.S b/newlib/libc/machine/aarch64/memcpy.S +index 39ff69a16..11e573ee0 100644 +--- a/newlib/libc/machine/aarch64/memcpy.S ++++ b/newlib/libc/machine/aarch64/memcpy.S +@@ -13,7 +13,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_FEATURE_UNALIGNED) + /* See memcpy-stub.c */ + #else + #include "asmdefs.h" +diff --git a/newlib/libc/machine/aarch64/memmove-stub.c b/newlib/libc/machine/aarch64/memmove-stub.c +index 41fd6643c..8498d3459 100644 +--- a/newlib/libc/machine/aarch64/memmove-stub.c ++++ b/newlib/libc/machine/aarch64/memmove-stub.c +@@ -26,7 +26,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_FEATURE_UNALIGNED) + # include "../../string/memmove.c" + #else + /* See memcpy.S */ +diff --git a/newlib/libc/machine/aarch64/memrchr-stub.c b/newlib/libc/machine/aarch64/memrchr-stub.c +index 63504543c..b9dc29211 100644 +--- a/newlib/libc/machine/aarch64/memrchr-stub.c ++++ b/newlib/libc/machine/aarch64/memrchr-stub.c +@@ -6,7 +6,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) || !defined(__ARM_FEATURE_UNALIGNED) + #include "../../string/memrchr.c" + #else + /* See memrchr.S */ +diff --git a/newlib/libc/machine/aarch64/memrchr.S b/newlib/libc/machine/aarch64/memrchr.S +index a843de79e..d442e3d13 100644 +--- a/newlib/libc/machine/aarch64/memrchr.S ++++ b/newlib/libc/machine/aarch64/memrchr.S +@@ -13,7 +13,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) || !defined(__ARM_FEATURE_UNALIGNED) + /* See memrchr-stub.c */ + #else + #include "asmdefs.h" +diff --git a/newlib/libc/machine/aarch64/memset-stub.c b/newlib/libc/machine/aarch64/memset-stub.c +index e7e8b54f7..3c51d470f 100644 +--- a/newlib/libc/machine/aarch64/memset-stub.c ++++ b/newlib/libc/machine/aarch64/memset-stub.c +@@ -26,7 +26,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) || !defined(__ARM_FEATURE_UNALIGNED) + # include "../../string/memset.c" + #else + /* See memset.S */ +diff --git a/newlib/libc/machine/aarch64/memset.S b/newlib/libc/machine/aarch64/memset.S +index 87a419964..7bb4525f4 100644 +--- a/newlib/libc/machine/aarch64/memset.S ++++ b/newlib/libc/machine/aarch64/memset.S +@@ -13,7 +13,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) || !defined(__ARM_FEATURE_UNALIGNED) + /* See memset-stub.c */ + #else + #include "asmdefs.h" +diff --git a/newlib/libc/machine/aarch64/rawmemchr-stub.c b/newlib/libc/machine/aarch64/rawmemchr-stub.c +index 032e0560c..c57f3ec30 100644 +--- a/newlib/libc/machine/aarch64/rawmemchr-stub.c ++++ b/newlib/libc/machine/aarch64/rawmemchr-stub.c +@@ -26,7 +26,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_FEATURE_UNALIGNED) + # include "../../string/rawmemchr.c" + #else + /* See rawmemchr.S. */ +diff --git a/newlib/libc/machine/aarch64/rawmemchr.S b/newlib/libc/machine/aarch64/rawmemchr.S +index dc4b257dd..4b114e746 100644 +--- a/newlib/libc/machine/aarch64/rawmemchr.S ++++ b/newlib/libc/machine/aarch64/rawmemchr.S +@@ -32,7 +32,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_FEATURE_UNALIGNED) + /* See rawmemchr-stub.c. */ + #else + +diff --git a/newlib/libc/machine/aarch64/stpcpy-stub.c b/newlib/libc/machine/aarch64/stpcpy-stub.c +index 045f1a551..d7fe3066a 100644 +--- a/newlib/libc/machine/aarch64/stpcpy-stub.c ++++ b/newlib/libc/machine/aarch64/stpcpy-stub.c +@@ -26,7 +26,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined (__ARM_FEATURE_UNALIGNED) + # include "../../string/stpcpy.c" + #else + /* See stpcpy.S */ +diff --git a/newlib/libc/machine/aarch64/strchr-stub.c b/newlib/libc/machine/aarch64/strchr-stub.c +index b9ae08393..90eb01da2 100644 +--- a/newlib/libc/machine/aarch64/strchr-stub.c ++++ b/newlib/libc/machine/aarch64/strchr-stub.c +@@ -26,7 +26,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) || !defined (__ARM_FEATURE_UNALIGNED) + # include "../../string/strchr.c" + #else + /* See strchr.S */ +diff --git a/newlib/libc/machine/aarch64/strchr.S b/newlib/libc/machine/aarch64/strchr.S +index a735889b1..6e3575aa0 100644 +--- a/newlib/libc/machine/aarch64/strchr.S ++++ b/newlib/libc/machine/aarch64/strchr.S +@@ -28,7 +28,7 @@ + OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) || !defined(__ARM_FEATURE_UNALIGNED) + /* See strchr-stub.c */ + #else + +diff --git a/newlib/libc/machine/aarch64/strchrnul-stub.c b/newlib/libc/machine/aarch64/strchrnul-stub.c +index aa1208cbb..e88cee2c6 100644 +--- a/newlib/libc/machine/aarch64/strchrnul-stub.c ++++ b/newlib/libc/machine/aarch64/strchrnul-stub.c +@@ -26,7 +26,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) || !defined(__ARM_FEATURE_UNALIGNED) + # include "../../string/strchrnul.c" + #else + /* See strchrnul.S */ +diff --git a/newlib/libc/machine/aarch64/strchrnul.S b/newlib/libc/machine/aarch64/strchrnul.S +index c60cef7d0..3a0b1dfde 100644 +--- a/newlib/libc/machine/aarch64/strchrnul.S ++++ b/newlib/libc/machine/aarch64/strchrnul.S +@@ -28,7 +28,7 @@ + OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) || !defined(__ARM_FEATURE_UNALIGNED) + /* See strchrnul-stub.c */ + #else + +diff --git a/newlib/libc/machine/aarch64/strcmp-stub.c b/newlib/libc/machine/aarch64/strcmp-stub.c +index 652e4f651..c8d60c56d 100644 +--- a/newlib/libc/machine/aarch64/strcmp-stub.c ++++ b/newlib/libc/machine/aarch64/strcmp-stub.c +@@ -26,7 +26,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined (__ARM_FEATURE_UNALIGNED) + # include "../../string/strcmp.c" + #else + /* See strcmp.S */ +diff --git a/newlib/libc/machine/aarch64/strcmp.S b/newlib/libc/machine/aarch64/strcmp.S +index 641d6ae22..82635762b 100644 +--- a/newlib/libc/machine/aarch64/strcmp.S ++++ b/newlib/libc/machine/aarch64/strcmp.S +@@ -7,7 +7,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_FEATURE_UNALIGNED) + /* See strcmp-stub.c */ + #else + +diff --git a/newlib/libc/machine/aarch64/strcpy-stub.c b/newlib/libc/machine/aarch64/strcpy-stub.c +index 4cfa19e9c..4f9a95100 100644 +--- a/newlib/libc/machine/aarch64/strcpy-stub.c ++++ b/newlib/libc/machine/aarch64/strcpy-stub.c +@@ -26,7 +26,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) || !defined (__ARM_FEATURE_UNALIGNED) + # include "../../string/strcpy.c" + #else + /* See strcpy.S */ +diff --git a/newlib/libc/machine/aarch64/strcpy.S b/newlib/libc/machine/aarch64/strcpy.S +index 62e5f3f37..eecb81bb5 100644 +--- a/newlib/libc/machine/aarch64/strcpy.S ++++ b/newlib/libc/machine/aarch64/strcpy.S +@@ -28,7 +28,7 @@ + OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) || !defined(__ARM_FEATURE_UNALIGNED) + /* See strcpy-stub.c */ + #else + +diff --git a/newlib/libc/machine/aarch64/strlen-stub.c b/newlib/libc/machine/aarch64/strlen-stub.c +index 3d9c3876c..ec44c927c 100644 +--- a/newlib/libc/machine/aarch64/strlen-stub.c ++++ b/newlib/libc/machine/aarch64/strlen-stub.c +@@ -26,7 +26,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) || !defined(__ARM_FEATURE_UNALIGNED) + # include "../../string/strlen.c" + #else + /* See strlen.S */ +diff --git a/newlib/libc/machine/aarch64/strlen.S b/newlib/libc/machine/aarch64/strlen.S +index 8e1a7cb7a..5204ad80d 100644 +--- a/newlib/libc/machine/aarch64/strlen.S ++++ b/newlib/libc/machine/aarch64/strlen.S +@@ -25,7 +25,7 @@ + OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) || !defined(__ARM_FEATURE_UNALIGNED) + /* See strlen-stub.c */ + #else + +diff --git a/newlib/libc/machine/aarch64/strncmp-stub.c b/newlib/libc/machine/aarch64/strncmp-stub.c +index 504c12d7b..6751bad38 100644 +--- a/newlib/libc/machine/aarch64/strncmp-stub.c ++++ b/newlib/libc/machine/aarch64/strncmp-stub.c +@@ -26,7 +26,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined (__ARM_FEATURE_UNALIGNED) + # include "../../string/strncmp.c" + #else + /* See strncmp.S */ +diff --git a/newlib/libc/machine/aarch64/strncmp.S b/newlib/libc/machine/aarch64/strncmp.S +index b2470a408..34c8bbec2 100644 +--- a/newlib/libc/machine/aarch64/strncmp.S ++++ b/newlib/libc/machine/aarch64/strncmp.S +@@ -26,7 +26,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_FEATURE_UNALIGNED) + /* See strncmp-stub.c */ + #else + +diff --git a/newlib/libc/machine/aarch64/strnlen-stub.c b/newlib/libc/machine/aarch64/strnlen-stub.c +index 2f50cdbdf..b1757b1ff 100644 +--- a/newlib/libc/machine/aarch64/strnlen-stub.c ++++ b/newlib/libc/machine/aarch64/strnlen-stub.c +@@ -26,7 +26,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) || !defined(__ARM_FEATURE_UNALIGNED) + # include "../../string/strnlen.c" + #else + /* See strnlen.S */ +diff --git a/newlib/libc/machine/aarch64/strnlen.S b/newlib/libc/machine/aarch64/strnlen.S +index e64137665..40fbeafb0 100644 +--- a/newlib/libc/machine/aarch64/strnlen.S ++++ b/newlib/libc/machine/aarch64/strnlen.S +@@ -28,7 +28,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) || !defined(__ARM_FEATURE_UNALIGNED) + /* See strnlen-stub.c */ + #else + +diff --git a/newlib/libc/machine/aarch64/strrchr-stub.c b/newlib/libc/machine/aarch64/strrchr-stub.c +index b8fe32f75..362a7086b 100644 +--- a/newlib/libc/machine/aarch64/strrchr-stub.c ++++ b/newlib/libc/machine/aarch64/strrchr-stub.c +@@ -26,7 +26,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) || !defined (__ARM_FEATURE_UNALIGNED) + # include "../../string/strrchr.c" + #else + /* See strrchr.S */ +diff --git a/newlib/libc/machine/aarch64/strrchr.S b/newlib/libc/machine/aarch64/strrchr.S +index 1fccba9f8..2f0cdc0c7 100644 +--- a/newlib/libc/machine/aarch64/strrchr.S ++++ b/newlib/libc/machine/aarch64/strrchr.S +@@ -29,7 +29,7 @@ + + #include + +-#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) ++#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED)) || !defined(__LP64__) || !defined(__ARM_NEON) || !defined(__ARM_FEATURE_UNALIGNED) + /* See strrchr-stub.c */ + #else + +-- +2.39.5 (Apple Git-154) + From 0bac691f9f88f0ec23469f99cfc714fa8d0a184b Mon Sep 17 00:00:00 2001 From: Simi Pallipurath Date: Wed, 20 Nov 2024 09:34:39 +0000 Subject: [PATCH 2/3] fixup! Add aarch64 library variants for no-unaligned-access --- arm-multilib/json/multilib.json | 10 +++++ .../json/variants/aarch64a_strictalign.json | 40 +++++++++++++++++++ .../aarch64a_strictalign_exn_rtti.json | 40 +++++++++++++++++++ 3 files changed, 90 insertions(+) create mode 100644 arm-multilib/json/variants/aarch64a_strictalign.json create mode 100644 arm-multilib/json/variants/aarch64a_strictalign_exn_rtti.json diff --git a/arm-multilib/json/multilib.json b/arm-multilib/json/multilib.json index 7f675317..5c77309b 100644 --- a/arm-multilib/json/multilib.json +++ b/arm-multilib/json/multilib.json @@ -10,6 +10,16 @@ "json": "aarch64a.json", "flags": "--target=aarch64-unknown-none-elf -fno-exceptions -fno-rtti" }, + { + "variant": "aarch64a_strictalign_exn_rtti", + "json": "aarch64a_strictalign_exn_rtti.json", + "flags": "--target=aarch64-unknown-none-elf -mno-unaligned-access" + }, + { + "variant": "aarch64a_strictalign", + "json": "aarch64a_strictalign.json", + "flags": "--target=aarch64-unknown-none-elf -mno-unaligned-access -fno-exceptions -fno-rtti" + }, { "variant": "armv4t_exn_rtti", "json": "armv4t_exn_rtti.json", diff --git a/arm-multilib/json/variants/aarch64a_strictalign.json b/arm-multilib/json/variants/aarch64a_strictalign.json new file mode 100644 index 00000000..98cc33c1 --- /dev/null +++ b/arm-multilib/json/variants/aarch64a_strictalign.json @@ -0,0 +1,40 @@ +{ + "args": { + "common": { + "TARGET_ARCH": "aarch64a", + "VARIANT": "aarch64a_strictalign", + "COMPILE_FLAGS": "-march=armv8-a -mno-unaligned-access", + "ENABLE_EXCEPTIONS": "OFF", + "ENABLE_RTTI": "OFF", + "TEST_EXECUTOR": "fvp", + "FVP_MODEL": "aem-a", + "FVP_CONFIG": "v8a-aarch64", + "BOOT_FLASH_ADDRESS": "0x80000000", + "BOOT_FLASH_SIZE": "0x1000", + "FLASH_ADDRESS": "0x80001000", + "FLASH_SIZE": "0xfff000", + "RAM_ADDRESS": "0x81000000", + "RAM_SIZE": "0x1000000", + "STACK_SIZE": "8K" + }, + "picolibc": { + "PICOLIBC_BUILD_TYPE": "release", + "ENABLE_CXX_LIBS": "ON", + "ENABLE_LIBC_TESTS": "ON", + "ENABLE_COMPILER_RT_TESTS": "OFF", + "ENABLE_LIBCXX_TESTS": "OFF" + }, + "newlib": { + "ENABLE_CXX_LIBS": "ON", + "ENABLE_LIBC_TESTS": "OFF", + "ENABLE_COMPILER_RT_TESTS": "OFF", + "ENABLE_LIBCXX_TESTS": "OFF" + }, + "llvmlibc": { + "ENABLE_CXX_LIBS": "OFF", + "ENABLE_LIBC_TESTS": "OFF", + "ENABLE_COMPILER_RT_TESTS": "OFF", + "ENABLE_LIBCXX_TESTS": "OFF" + } + } +} diff --git a/arm-multilib/json/variants/aarch64a_strictalign_exn_rtti.json b/arm-multilib/json/variants/aarch64a_strictalign_exn_rtti.json new file mode 100644 index 00000000..1f579b9c --- /dev/null +++ b/arm-multilib/json/variants/aarch64a_strictalign_exn_rtti.json @@ -0,0 +1,40 @@ +{ + "args": { + "common": { + "TARGET_ARCH": "aarch64a", + "VARIANT": "aarch64a_strictalign_exn_rtti", + "COMPILE_FLAGS": "-march=armv8-a -mno-unaligned-access", + "ENABLE_EXCEPTIONS": "ON", + "ENABLE_RTTI": "ON", + "TEST_EXECUTOR": "fvp", + "FVP_MODEL": "aem-a", + "FVP_CONFIG": "v8a-aarch64", + "BOOT_FLASH_ADDRESS": "0x80000000", + "BOOT_FLASH_SIZE": "0x1000", + "FLASH_ADDRESS": "0x80001000", + "FLASH_SIZE": "0xfff000", + "RAM_ADDRESS": "0x81000000", + "RAM_SIZE": "0x1000000", + "STACK_SIZE": "8K" + }, + "picolibc": { + "PICOLIBC_BUILD_TYPE": "release", + "ENABLE_CXX_LIBS": "ON", + "ENABLE_LIBC_TESTS": "ON", + "ENABLE_COMPILER_RT_TESTS": "OFF", + "ENABLE_LIBCXX_TESTS": "OFF" + }, + "newlib": { + "ENABLE_CXX_LIBS": "ON", + "ENABLE_LIBC_TESTS": "OFF", + "ENABLE_COMPILER_RT_TESTS": "OFF", + "ENABLE_LIBCXX_TESTS": "OFF" + }, + "llvmlibc": { + "ENABLE_CXX_LIBS": "OFF", + "ENABLE_LIBC_TESTS": "OFF", + "ENABLE_COMPILER_RT_TESTS": "OFF", + "ENABLE_LIBCXX_TESTS": "OFF" + } + } +} From 7514e6986055f6ea5fb7a786ec46ba364a412e1a Mon Sep 17 00:00:00 2001 From: Simi Pallipurath Date: Tue, 26 Nov 2024 15:41:23 +0000 Subject: [PATCH 3/3] fixup! Merge branch 'main' into no-unaligned-access Adding this patch https://github.com/picolibc/picolibc/pull/874 as a downstream which has the necesary boot code changes in order for the -mno-unaligned-access to work. --- ...Code-Changes-to-enable-the-Alignment.patch | 68 +++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 patches/picolibc/0004-ARM-AARCH64-BootCode-Changes-to-enable-the-Alignment.patch diff --git a/patches/picolibc/0004-ARM-AARCH64-BootCode-Changes-to-enable-the-Alignment.patch b/patches/picolibc/0004-ARM-AARCH64-BootCode-Changes-to-enable-the-Alignment.patch new file mode 100644 index 00000000..0a0bd275 --- /dev/null +++ b/patches/picolibc/0004-ARM-AARCH64-BootCode-Changes-to-enable-the-Alignment.patch @@ -0,0 +1,68 @@ +From 11abbd6533eeacbb000fc19bd07316e11fcb6fea Mon Sep 17 00:00:00 2001 +From: Simi Pallipurath +Date: Tue, 26 Nov 2024 15:20:50 +0000 +Subject: [ARM/AARCH64] BootCode Changes to enable the Alignment Check + bit and disable the unaligned access bit + +We need changes in both Arm/AArch64 bootcode in +order for the -mno-unaligned-access to work. + +We need to enable the Alignment Check bit in the +System Control Register (SCTLR) which is the +Bit 1 (A) and it turn on alignment fault checking +for data accesses . If an unaligned data access +occurs, an alignment fault exception will be generated. + +Also need to disable the Unaligned Access Enable(U) bit +in the System Control Register (SCTLR). As a result, +unaligned data accesses will generate an alignment fault exception. +--- + picocrt/machine/aarch64/crt0.c | 7 ++++++- + picocrt/machine/arm/crt0.c | 6 ++++++ + 2 files changed, 12 insertions(+), 1 deletion(-) + +diff --git a/picocrt/machine/aarch64/crt0.c b/picocrt/machine/aarch64/crt0.c +index dfe838111..885282f4d 100644 +--- a/picocrt/machine/aarch64/crt0.c ++++ b/picocrt/machine/aarch64/crt0.c +@@ -144,7 +144,12 @@ void _cstart(void) + */ + __asm__("mrs %x0, sctlr_"BOOT_EL"" : "=r" (sctlr)); + sctlr |= SCTLR_ICACHE | SCTLR_C | SCTLR_MMU; +- sctlr &= ~(SCTLR_A | SCTLR_WXN); ++ #ifdef __ARM_FEATURE_UNALIGNED ++ sctlr &= ~SCTLR_A; ++ #else ++ sctlr |= SCTLR_A; ++ #endif ++ sctlr &= ~SCTLR_WXN; + __asm__("msr sctlr_"BOOT_EL", %x0" :: "r" (sctlr)); + __asm__("isb\n"); + +diff --git a/picocrt/machine/arm/crt0.c b/picocrt/machine/arm/crt0.c +index 60efafc9c..e27ccb6a9 100644 +--- a/picocrt/machine/arm/crt0.c ++++ b/picocrt/machine/arm/crt0.c +@@ -246,6 +246,8 @@ _cstart(void) + #define SCTLR_BRANCH_PRED (1 << 11) + #define SCTLR_ICACHE (1 << 12) + #define SCTLR_TRE (1 << 28) ++#define SCTLR_A (1 << 1) ++#define SCTLR_U (1 << 22) + + uint32_t mmfr0; + __asm__("mrc p15, 0, %0, c0, c1, 4" : "=r" (mmfr0)); +@@ -280,6 +282,10 @@ _cstart(void) + uint32_t sctlr; + __asm__("mrc p15, 0, %0, c1, c0, 0" : "=r" (sctlr)); + sctlr |= SCTLR_ICACHE | SCTLR_BRANCH_PRED | SCTLR_DATA_L2 | SCTLR_MMU; ++ #ifndef __ARM_FEATURE_UNALIGNED ++ sctlr |= SCTLR_A; ++ sctlr &= ~SCTLR_U; ++ #endif + sctlr &= ~SCTLR_TRE; + __asm__("mcr p15, 0, %0, c1, c0, 0\n" :: "r" (sctlr)); + __asm__("isb\n"); +-- +2.34.1 +