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[FMV] Unify sha1, sha2. (#347)
According to ArmARM: SHA2, bits [15:12] 0b0000 No SHA2 instructions implemented. FEAT_SHA256 implements the functionality identified by the value 0b0001. If the value of ID_AA64ISAR0_EL1.SHA1 is 0b0000, this field must have the value 0b0000. SHA1, bits [11:8] 0b0000 No SHA1 instructions implemented. FEAT_SHA1 implements the functionality identified by the value 0b0001. If the value of ID_AA64ISAR0_EL1.SHA2 is 0b0000, this field must have the value 0b0000. To my understanding this means you can't have one without the other.
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main/acle.md

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@@ -402,6 +402,7 @@ Armv8.4-A [[ARMARMv84]](#ARMARMv84). Support is added for the Dot Product intrin
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a misplaced anchor.
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* Added `__FUNCTION_MULTI_VERSIONING_SUPPORT_LEVEL` to indicate the support
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level of the [Function Multi Versioning](#function-multi-versioning).
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* Unified Function Multi Versioning features sha1, sha2.
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* Added [**Alpha**](#current-status-and-anticipated-changes)
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support for SME2.1 (FEAT_SME2p1).
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* Removed requirement to add preprocessor guards for header files.
@@ -2714,8 +2715,7 @@ The following table lists the architectures feature mapping for AArch64
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| 106 | `FEAT_SM3`, `FEAT_SM4` | sm4 | ```ID_AA64ISAR0_EL1.SM4 >= 0b0001``` |
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| 108 | `FEAT_RDM` | rdm, rdma | ```ID_AA64ISAR0_EL1.RDM >= 0b0001``` |
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| 110 | `FEAT_CRC32` | crc | ```ID_AA64ISAR0_EL1.CRC32 >= 0b0001``` |
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| 120 | `FEAT_SHA1` | sha1 | ```ID_AA64ISAR0_EL1.SHA1 >= 0b0001``` |
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| 130 | `FEAT_SHA256` | sha2 | ```ID_AA64ISAR0_EL1.SHA2 >= 0b0001``` |
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| 130 | `FEAT_SHA1`,`FEAT_SHA256`| sha2 | ```ID_AA64ISAR0_EL1.SHA2 >= 0b0001``` |
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| 140 | `FEAT_SHA512`,`FEAT_SHA3`| sha3 | ```ID_AA64ISAR0_EL1.SHA3 >= 0b0001``` |
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| 150 | `FEAT_AES` | aes | ```ID_AA64ISAR0_EL1.AES >= 0b0001``` |
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| 160 | `FEAT_PMULL` | pmull | ```ID_AA64ISAR0_EL1.AES >= 0b0010``` |

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