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| 1 | +/** |
| 2 | + * @file IO_Config.h |
| 3 | + * @brief |
| 4 | + * |
| 5 | + * DAPLink Interface Firmware |
| 6 | + * Copyright (c) 2009-2016, ARM Limited, All Rights Reserved |
| 7 | + * SPDX-License-Identifier: Apache-2.0 |
| 8 | + * |
| 9 | + * Licensed under the Apache License, Version 2.0 (the "License"); you may |
| 10 | + * not use this file except in compliance with the License. |
| 11 | + * You may obtain a copy of the License at |
| 12 | + * |
| 13 | + * http://www.apache.org/licenses/LICENSE-2.0 |
| 14 | + * |
| 15 | + * Unless required by applicable law or agreed to in writing, software |
| 16 | + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT |
| 17 | + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 18 | + * See the License for the specific language governing permissions and |
| 19 | + * limitations under the License. |
| 20 | + */ |
| 21 | + |
| 22 | +// Override all defines if IO_CONFIG_OVERRIDE is defined |
| 23 | + |
| 24 | +#ifndef __IO_CONFIG_OVERRIDE_H__ |
| 25 | +#define __IO_CONFIG_OVERRIDE_H__ |
| 26 | + |
| 27 | +#include "MKL26Z4.h" |
| 28 | +#include "compiler.h" |
| 29 | +#include "daplink.h" |
| 30 | + |
| 31 | +// This GPIO configuration is only valid for the KL26 HIC |
| 32 | +COMPILER_ASSERT(DAPLINK_HIC_ID == DAPLINK_HIC_ID_KL26); |
| 33 | + |
| 34 | + |
| 35 | +// Debug Port I/O Pins |
| 36 | + |
| 37 | +// SWCLK Pin PTC5(C5) |
| 38 | +#define PIN_SWCLK_PORT PORTC |
| 39 | +#define PIN_SWCLK_GPIO PTC |
| 40 | +#define PIN_SWCLK_BIT (5) |
| 41 | +#define PIN_SWCLK (1<<PIN_SWCLK_BIT) |
| 42 | + |
| 43 | +// SWDIO Pin PTC6(C6) |
| 44 | +#define PIN_SWDIO_PORT PORTC |
| 45 | +#define PIN_SWDIO_GPIO PTC |
| 46 | +#define PIN_SWDIO_BIT (6) |
| 47 | +#define PIN_SWDIO (1<<PIN_SWDIO_BIT) |
| 48 | + |
| 49 | +// nRESET Pin PTC8(C8) |
| 50 | +#define PIN_nRESET_PORT PORTC |
| 51 | +#define PIN_nRESET_GPIO PTC |
| 52 | +#define PIN_nRESET_BIT (1/*8 DUE TO SMALLER PACKAGE*/) |
| 53 | +#define PIN_nRESET (1<<PIN_nRESET_BIT) |
| 54 | + |
| 55 | +// PWR_REG_EN PTD2 - Not connected |
| 56 | +#define PIN_POWER_EN_PORT PORTD |
| 57 | +#define PIN_POWER_EN_GPIO PTD |
| 58 | +#define PIN_POWER_EN_BIT (2) |
| 59 | +#define PIN_POWER_EN (1<<PIN_POWER_EN_BIT) |
| 60 | + |
| 61 | +// VTRG_FAULT_B PTD3 - Not connected |
| 62 | +#define PIN_VTRG_FAULT_B_PORT PORTD |
| 63 | +#define PIN_VTRG_FAULT_B_GPIO PTD |
| 64 | +#define PIN_VTRG_FAULT_B_BIT (7) |
| 65 | +#define PIN_VTRG_FAULT_B_EN (1<<PIN_VTRG_FAULT_B_BIT) |
| 66 | + |
| 67 | +// Debug Unit LEDs |
| 68 | + |
| 69 | +// HID_LED PTD4 |
| 70 | +#define PIN_HID_LED_PORT PORTD |
| 71 | +#define PIN_HID_LED_GPIO PTD |
| 72 | +#define PIN_HID_LED_BIT (4) |
| 73 | +#define PIN_HID_LED (1<<PIN_HID_LED_BIT) |
| 74 | + |
| 75 | +// MSC_LED PTD5 |
| 76 | +#define PIN_MSC_LED_PORT PORTD |
| 77 | +#define PIN_MSC_LED_GPIO PTD |
| 78 | +#define PIN_MSC_LED_BIT (4) |
| 79 | +#define PIN_MSC_LED (1<<PIN_MSC_LED_BIT) |
| 80 | + |
| 81 | +// CDC_LED PTD6 |
| 82 | +#define PIN_CDC_LED_PORT PORTD |
| 83 | +#define PIN_CDC_LED_GPIO PTD |
| 84 | +#define PIN_CDC_LED_BIT (4) |
| 85 | +#define PIN_CDC_LED (1<<PIN_CDC_LED_BIT) |
| 86 | + |
| 87 | +// SW RESET BUTTON PTB1 |
| 88 | +#define PIN_SW_RESET_PORT PORTB |
| 89 | +#define PIN_SW_RESET_GPIO PTB |
| 90 | +#define PIN_SW_RESET_BIT (1) |
| 91 | +#define PIN_SW_RESET (1<<PIN_SW_RESET_BIT) |
| 92 | + |
| 93 | +// Connected LED Not available |
| 94 | + |
| 95 | +// Target Running LED Not available |
| 96 | + |
| 97 | +// UART |
| 98 | +#define UART_PORT PORTC |
| 99 | +#define UART_NUM (1) |
| 100 | +// RX PTC3 |
| 101 | +#define PIN_UART_RX_GPIO PTC |
| 102 | +#define PIN_UART_RX_BIT (3) |
| 103 | +#define PIN_UART_RX (1<<PIN_UART_RX_BIT) |
| 104 | +#define PIN_UART_RX_MUX_ALT (3) |
| 105 | +// TX PTC4 |
| 106 | +#define PIN_UART_TX_GPIO PTC |
| 107 | +#define PIN_UART_TX_BIT (4) |
| 108 | +#define PIN_UART_TX (1<<PIN_UART_TX_BIT) |
| 109 | +#define PIN_UART_TX_MUX_ALT (3) |
| 110 | + |
| 111 | +#define UART UART1 |
| 112 | +#define UART_RX_TX_IRQn UART1_IRQn |
| 113 | +#define UART_RX_TX_IRQHandler UART1_IRQHandler |
| 114 | + |
| 115 | +#endif |
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