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stm32f072xx_hic: re-organize DAP_config/IO_Config
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+123
-215
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4 files changed

+123
-215
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source/hic_hal/stm32/stm32f072xx/DAP_config.c

Lines changed: 0 additions & 126 deletions
This file was deleted.

source/hic_hal/stm32/stm32f072xx/DAP_config.h

Lines changed: 105 additions & 47 deletions
Original file line numberDiff line numberDiff line change
@@ -176,20 +176,62 @@ Configures the DAP Hardware I/O pins for JTAG mode:
176176
- TCK, TMS, TDI, nTRST, nRESET to output mode and set to high level.
177177
- TDO to input mode.
178178
*/
179-
void PORT_JTAG_SETUP(void);
179+
__STATIC_INLINE void PORT_JTAG_SETUP(void)
180+
{
181+
#if (DAP_JTAG != 0)
182+
183+
#endif
184+
}
180185

181186
/** Setup SWD I/O pins: SWCLK, SWDIO, and nRESET.
182187
Configures the DAP Hardware I/O pins for Serial Wire Debug (SWD) mode:
183188
- SWCLK, SWDIO, nRESET to output mode and set to default high level.
184189
- TDI, TMS, nTRST to HighZ mode (pins are unused in SWD mode).
185190
*/
186-
void PORT_SWD_SETUP(void);
191+
__STATIC_INLINE void PORT_SWD_SETUP(void)
192+
{
193+
GPIO_InitTypeDef GPIO_InitStruct;
194+
195+
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
196+
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
197+
GPIO_InitStruct.Pull = GPIO_NOPULL;
198+
199+
HAL_GPIO_WritePin(SWCLK_TCK_PORT, SWCLK_TCK_PIN, GPIO_PIN_SET);
200+
GPIO_InitStruct.Pin = SWCLK_TCK_PIN;
201+
HAL_GPIO_Init(SWCLK_TCK_PORT, &GPIO_InitStruct);
202+
203+
HAL_GPIO_WritePin(SWDIO_TMS_PORT, SWDIO_TMS_PIN, GPIO_PIN_SET);
204+
GPIO_InitStruct.Pin = SWDIO_TMS_PIN;
205+
HAL_GPIO_Init(SWDIO_TMS_PORT, &GPIO_InitStruct);
206+
207+
HAL_GPIO_WritePin(nRESET_PORT, nRESET_PIN, GPIO_PIN_SET);
208+
GPIO_InitStruct.Pin = nRESET_PIN;
209+
HAL_GPIO_Init(nRESET_PORT, &GPIO_InitStruct);
210+
}
211+
187212

188213
/** Disable JTAG/SWD I/O Pins.
189214
Disables the DAP Hardware I/O pins which configures:
190215
- TCK/SWCLK, TMS/SWDIO, TDI, TDO, nTRST, nRESET to High-Z mode.
191216
*/
192-
void PORT_OFF(void);
217+
__STATIC_INLINE void PORT_OFF(void)
218+
{
219+
GPIO_InitTypeDef GPIO_InitStruct;
220+
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
221+
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
222+
223+
HAL_GPIO_WritePin(SWCLK_TCK_PORT, SWCLK_TCK_PIN, GPIO_PIN_SET);
224+
GPIO_InitStruct.Pin = SWCLK_TCK_PIN;
225+
HAL_GPIO_Init(SWCLK_TCK_PORT, &GPIO_InitStruct);
226+
227+
HAL_GPIO_WritePin(SWDIO_TMS_PORT, SWDIO_TMS_PIN, GPIO_PIN_SET);
228+
GPIO_InitStruct.Pin = SWDIO_TMS_PIN;
229+
HAL_GPIO_Init(SWDIO_TMS_PORT, &GPIO_InitStruct);
230+
231+
HAL_GPIO_WritePin(nRESET_PORT, nRESET_PIN, GPIO_PIN_SET);
232+
GPIO_InitStruct.Pin = nRESET_PIN;
233+
HAL_GPIO_Init(nRESET_PORT, &GPIO_InitStruct);
234+
}
193235

194236
#define PIN_IN(__name) ((__name##_PORT->IDR & __name##_PIN) ? 1 : 0)
195237
#define PIN_SET(__name) (__name##_PORT->BSRR = __name##_PIN)
@@ -244,80 +286,79 @@ Set the SWDIO/TMS DAP hardware I/O pin to low level.
244286
Configure the SWDIO DAP hardware I/O pin to output mode. This function is
245287
called prior \ref PIN_SWDIO_OUT function calls.
246288
*/
247-
void PIN_SWDIO_OUT_ENABLE(void);
289+
__STATIC_INLINE void PIN_SWDIO_OUT_ENABLE(void)
290+
{
291+
GPIO_InitTypeDef GPIO_InitStruct;
292+
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
293+
GPIO_InitStruct.Pull = GPIO_NOPULL;
294+
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
295+
GPIO_InitStruct.Pin = SWDIO_TMS_PIN;
296+
HAL_GPIO_Init(SWDIO_TMS_PORT, &GPIO_InitStruct);
297+
}
248298

249299
/** SWDIO I/O pin: Switch to Input mode (used in SWD mode only).
250300
Configure the SWDIO DAP hardware I/O pin to input mode. This function is
251301
called prior \ref PIN_SWDIO_IN function calls.
252302
*/
253-
void PIN_SWDIO_OUT_DISABLE(void);
303+
__STATIC_INLINE void PIN_SWDIO_OUT_DISABLE(void)
304+
{
305+
GPIO_InitTypeDef GPIO_InitStruct;
306+
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
307+
GPIO_InitStruct.Pull = GPIO_PULLUP;
308+
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
309+
GPIO_InitStruct.Pin = SWDIO_TMS_PIN;
310+
HAL_GPIO_Init(SWDIO_TMS_PORT, &GPIO_InitStruct);
311+
}
254312

255-
#if (DAP_JTAG != 0)
256313
// TDI Pin I/O ---------------------------------------------
257314

258315
/** TDI I/O pin: Get Input.
259316
\return Current status of the TDI DAP hardware I/O pin.
260317
*/
261-
#define PIN_TDI_IN() PIN_IN(TDI)
262-
/** TDI I/O pin: Set Output.
263-
\param bit Output value for the TDI DAP hardware I/O pin.
264-
*/
265-
#define PIN_TDI_OUT(__bit) PIN_OUT(TDI, __bit)
266-
267-
// TDO Pin I/O ---------------------------------------------
268-
269-
/** TDO I/O pin: Get Input.
270-
\return Current status of the TDO DAP hardware I/O pin.
271-
*/
272-
#define PIN_TDO_IN() PIN_IN(TDO)
273-
274-
// nTRST Pin I/O -------------------------------------------
275-
276-
/** nTRST I/O pin: Get Input.
277-
\return Current status of the nTRST DAP hardware I/O pin.
278-
*/
279-
#define PIN_nTRST_IN() PIN_IN(nTRST)
280-
281-
/** nTRST I/O pin: Set Output.
282-
\param bit JTAG TRST Test Reset pin status:
283-
- 0: issue a JTAG TRST Test Reset.
284-
- 1: release JTAG TRST Test Reset.
285-
*/
286-
#define PIN_nTRST_OUT(__bit) PIN_OUT(nTRST, __bit)
287-
#else
288-
// TDI Pin I/O ---------------------------------------------
318+
__STATIC_FORCEINLINE uint32_t PIN_TDI_IN(void)
319+
{
320+
return (0); // Not available
321+
}
289322

290-
/** TDI I/O pin: Get Input.
291-
\return Current status of the TDI DAP hardware I/O pin.
292-
*/
293-
#define PIN_TDI_IN() 1
294323
/** TDI I/O pin: Set Output.
295324
\param bit Output value for the TDI DAP hardware I/O pin.
296325
*/
297-
#define PIN_TDI_OUT(__bit)
326+
__STATIC_FORCEINLINE void PIN_TDI_OUT(uint32_t bit)
327+
{
328+
; // Not available
329+
}
330+
298331

299332
// TDO Pin I/O ---------------------------------------------
300333

301334
/** TDO I/O pin: Get Input.
302335
\return Current status of the TDO DAP hardware I/O pin.
303336
*/
304-
#define PIN_TDO_IN() 1
337+
__STATIC_FORCEINLINE uint32_t PIN_TDO_IN(void)
338+
{
339+
return (0); // Not available
340+
}
341+
305342

306343
// nTRST Pin I/O -------------------------------------------
307344

308345
/** nTRST I/O pin: Get Input.
309346
\return Current status of the nTRST DAP hardware I/O pin.
310347
*/
311-
#define PIN_nTRST_IN() 1
348+
__STATIC_FORCEINLINE uint32_t PIN_nTRST_IN(void)
349+
{
350+
return (0); // Not available
351+
}
312352

313353
/** nTRST I/O pin: Set Output.
314354
\param bit JTAG TRST Test Reset pin status:
315355
- 0: issue a JTAG TRST Test Reset.
316356
- 1: release JTAG TRST Test Reset.
317357
*/
318-
#define PIN_nTRST_OUT(__bit)
319-
320-
#endif
358+
__STATIC_FORCEINLINE void PIN_nTRST_OUT(uint32_t bit)
359+
{
360+
; // Not available
361+
}
321362

322363
// nRESET Pin I/O------------------------------------------
323364

@@ -384,7 +425,7 @@ default, the DWT timer is used. The frequency of this timer is configured with
384425
\return Current timestamp value.
385426
*/
386427
__STATIC_INLINE uint32_t TIMESTAMP_GET (void) {
387-
return 0; //(DWT->CYCCNT) / (CPU_CLOCK / TIMESTAMP_CLOCK);
428+
return (0); // Not available
388429
}
389430

390431
///@}
@@ -406,7 +447,21 @@ Status LEDs. In detail the operation of Hardware I/O and LED pins are enabled an
406447
- for nTRST, nRESET a weak pull-up (if available) is enabled.
407448
- LED output pins are enabled and LEDs are turned off.
408449
*/
409-
void DAP_SETUP(void);
450+
__STATIC_INLINE void DAP_SETUP(void)
451+
{
452+
GPIO_InitTypeDef GPIO_InitStruct;
453+
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
454+
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
455+
GPIO_InitStruct.Pull = GPIO_NOPULL;
456+
457+
HAL_GPIO_WritePin(LED_CONNECTED_PORT, LED_CONNECTED_PIN, GPIO_PIN_SET);
458+
GPIO_InitStruct.Pin = LED_CONNECTED_PIN;
459+
HAL_GPIO_Init(LED_CONNECTED_PORT, &GPIO_InitStruct);
460+
461+
HAL_GPIO_WritePin(LED_RUNNING_PORT, LED_RUNNING_PIN, GPIO_PIN_SET);
462+
GPIO_InitStruct.Pin = LED_RUNNING_PIN;
463+
HAL_GPIO_Init(LED_RUNNING_PORT, &GPIO_InitStruct);
464+
}
410465

411466
/** Reset Target Device with custom specific I/O pin or command sequence.
412467
This function allows the optional implementation of a device specific reset sequence.
@@ -415,7 +470,10 @@ when a device needs a time-critical unlock sequence that enables the debug port.
415470
\return 0 = no device specific reset sequence is implemented.\n
416471
1 = a device specific reset sequence is implemented.
417472
*/
418-
uint32_t RESET_TARGET(void);
473+
__STATIC_INLINE uint32_t RESET_TARGET(void)
474+
{
475+
return (0); // change to '1' when a device reset sequence is implemented
476+
}
419477

420478
///@}
421479

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