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lpc55xx_hic: change memory map to support LPC552x models (#895)
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docs/hic/lpc55xx.md

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@@ -8,19 +8,19 @@ Based on LPC55S69JBD64 chip ([Data Sheet](https://www.nxp.com/docs/en/data-sheet
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- HTQFP64 packaging
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In order to support other MCUs from the LPC5500 family, the HIC limits usage
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to one core, 320 KB Flash and 256 KB RAM.
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to one core, 256 KB Flash and 96 KB RAM.
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## Memory Map
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| Region | Size | Start | End |
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|----------|--------|-------------|-------------|
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| Flash | 320 KB | 0x0000_0000 | 0x0005_1000 |
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| SRAM | 256 KB | 0x2000_0000 | 0x2004_0000 |
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| Flash | 256 KB | 0x0000_0000 | 0x0004_0000 |
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| SRAM | 96 KB | 0x2000_0000 | 0x2004_0000 |
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| USB RAM | 16 KB | 0x4010_0000 | 0x4010_4000 |
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Bootloader size is 64 KB
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## DAPLink default pin assignment
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## DAPLink default pin assignment
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Reference design is based on [MCU-Link](https://www.nxp.com/design/development-boards/lpcxpresso-boards/mcu-link-debug-probe:MCU-LINK).
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source/hic_hal/nxp/lpc55xx/daplink_addr.h

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@@ -22,8 +22,8 @@
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// Flash layout:
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//
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// [ 0x0000_0000 - 0x0000_FFFF ]: 64 kB - bootloader
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// [ 0x0001_0000 - 0x0004_FFFF ]: 256 kB - interface
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// [ 0x0005_0000 - 0x0005_0FFF ]: 4 kB - persistent config (cfgrom)
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// [ 0x0001_0000 - 0x0003_FBFF ]: 191 kB - interface
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// [ 0x0003_FC00 - 0x0003_FFFF ]: 1 kB - persistent config (cfgrom)
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//
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// Notes:
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// 1. The interface does not extend to the end of flash because that makes the binary
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/* Device sizes */
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#define DAPLINK_ROM_START 0x00000000 // NS alias
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#define DAPLINK_ROM_SIZE 0x00051000 // 64 kB BL + 256 kB IF + 4 kB config
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#define DAPLINK_ROM_SIZE 0x00040000 // 64 kB BL + 191 kB IF + 1 kB config
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#define DAPLINK_RAM_START 0x20000000 // NS alias
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#define DAPLINK_RAM_SIZE 0x00040000 // SRAM 0-3
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#define DAPLINK_RAM_SIZE 0x00018000 // SRAM 0-1
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/* ROM sizes */
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#define DAPLINK_ROM_BL_START 0x00000000
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#define DAPLINK_ROM_BL_SIZE 0x00010000 // 64 kB bootloader
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#define DAPLINK_ROM_CONFIG_ADMIN_START 0x00010000
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#define DAPLINK_ROM_CONFIG_ADMIN_SIZE 0x00000000
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#define DAPLINK_ROM_IF_START 0x00010000
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#define DAPLINK_ROM_IF_SIZE 0x00040000
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#define DAPLINK_ROM_IF_SIZE 0x0002FC00 // 191 kB interface
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#define DAPLINK_ROM_CONFIG_USER_START 0x00050000
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#define DAPLINK_ROM_CONFIG_USER_SIZE 0x00001000
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#define DAPLINK_ROM_CONFIG_USER_START 0x0003FC00
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#define DAPLINK_ROM_CONFIG_USER_SIZE 0x00000400 // 1 kB config
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/* RAM sizes */
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#define DAPLINK_RAM_APP_START 0x20000000
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#define DAPLINK_RAM_APP_SIZE 0x0003FF00
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#define DAPLINK_RAM_APP_SIZE 0x00017F00
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#define DAPLINK_RAM_SHARED_START 0x2003FF00
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#define DAPLINK_RAM_SHARED_START 0x20017F00
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#define DAPLINK_RAM_SHARED_SIZE 0x00000100
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/* Flash Programming Info */

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