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Add nrf52820 HIC (#882)
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‎docs/hic/README.md‎

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| [lpc4322](lpc4322.md) | M4 | 96 MHz | 256 KB | 256 KB | HS |
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| [lpc55xx](lpc55xx.md) | M33 | 150 MHz | 272 KB | 320 KB | HS |
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| [max32625](max32625.md) | M4 | 96 MHz | 160 KB | 512 KB | FS |
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| [nrf52820](nrf52820.md) | M4 | 64 MHz | 32 KB | 256 KB | FS |
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| [sam3u2c](sam3u2c.md) | M3 | 96 MHz | 32 KB | 128 KB | HS |
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| [stm32f103xb](stm32f103xb.md) | M3 | 72 Mhz | 20 KB | 128 KB | FS |
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‎docs/hic/nrf52820.md‎

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# nrf52820 HIC
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Based on Nordic [nRF52820](https://www.nordicsemi.com/Products/nRF52820)
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and [nRF52833](https://www.nordicsemi.com/Products/nRF52833):
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- Cortex-M4 64 MHz
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- 256 KB Flash
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- 32 KB RAM
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- Full-speed USB 2.0 device controller
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- QFN40 packaging
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## Memory Map
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| Region | Size | Start | End |
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|----------|--------|-------------|-------------|
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| Flash | 128 KB | 0x0000_0000 | 0x0002_0000 |
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| SRAM | 32 KB | 0x2000_0000 | 0x2000_8000 |
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Bootloader size is 32 KB
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Limiting flash usage to 128 KB
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## DAPLink default pin assignment
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# nrf52820
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| Signal | I/O | Symbol | Pin |
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|-------------|:---:|---------|:---:|
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| SWD |
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| SWCLK | O | P0.01 | 3 |
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| SWDIO | I/O | P0.00 | 2 |
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| UART |
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| UART TX | I | P0.29 | 32 |
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| UART RX | O | P0.08 | 31 |
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| Button |
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| F-RST But. | I | P0.06 | 6 |
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| LEDs |
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| HID LED | O | P0.14 | 14 |
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| MSD LED | O | P0.14 | 14 |
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| CDC LED | O | P0.14 | 14 |
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| POWER LED | O | P0.15 | 15 |
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Note:
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- LEDs have active state high.
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# nrf52833
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| Signal | I/O | Symbol | Pin |
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|-------------|:---:|---------|:---:|
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| SWD |
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| SWCLK | O | P0.01 | 3 |
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| SWDIO | I/O | P0.00 | 2 |
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| UART |
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| UART TX | I | P0.02 | 32 |
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| UART RX | O | P0.03 | 31 |
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| Button |
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| F-RST But. | I | P1.09 | 6 |
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| LEDs |
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| HID LED | O | P0.15 | 14 |
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| MSD LED | O | P0.15 | 14 |
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| CDC LED | O | P0.15 | 14 |
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| POWER LED | O | P0.17 | 15 |
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Note:
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- LEDs have active state high.

‎projects.yaml‎

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- records/rtos/rtos-cm33.yaml
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- records/hic_hal/lpc55s69.yaml
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- records/usb/usb-bulk.yaml
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hic_sam3u2c: &module_hic_sam3u2c
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- records/rtos/rtos-cm3.yaml
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- records/hic_hal/sam3u2c.yaml
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hic_stm32f103xb: &module_hic_stm32f103xb
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- records/rtos/rtos-cm3.yaml
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- records/hic_hal/stm32f103xb.yaml
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hic_m48ssidae: &module_hic_m48ssidae
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- records/rtos/rtos-cm4.yaml
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- records/hic_hal/m48ssidae.yaml
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hic_max32620: &module_hic_max32620
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- records/rtos/rtos-cm4.yaml
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- records/hic_hal/max32620.yaml
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hic_max32625: &module_hic_max32625
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- records/rtos/rtos-cm4.yaml
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- records/hic_hal/max32625.yaml
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hic_m48ssidae: &module_hic_m48ssidae
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hic_nrf52820: &module_hic_nrf52820
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- records/rtos/rtos-cm4.yaml
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- records/hic_hal/m48ssidae.yaml
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- records/hic_hal/nrf52820.yaml
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- records/usb/usb-bulk.yaml
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hic_sam3u2c: &module_hic_sam3u2c
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- records/rtos/rtos-cm3.yaml
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- records/hic_hal/sam3u2c.yaml
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hic_stm32f103xb: &module_hic_stm32f103xb
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- records/rtos/rtos-cm3.yaml
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- records/hic_hal/stm32f103xb.yaml
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projects:
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# HIC bootloaders and all target interfaces
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- *module_hic_max32625
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- records/family/all_family.yaml
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- records/usb/usb-bulk.yaml
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nrf52820_bl:
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- *module_bl
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- records/hic_hal/nrf52820.yaml
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- records/board/nrf52820_bl.yaml
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nrf52820_if:
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- *module_if
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- *module_hic_nrf52820
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- records/family/all_family.yaml
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sam3u2c_bl:
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- *module_bl
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- records/hic_hal/sam3u2c.yaml

‎records/board/nrf52820_bl.yaml‎

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common:
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sources:
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board:
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- source/board/nrf52820_bl.c

‎records/hic_hal/nrf52820.yaml‎

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common:
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target:
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- Cortex-M4
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core:
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- Cortex-M4
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macros:
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- INTERFACE_NRF52820
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- NRF52820_XXAA
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- DAPLINK_HIC_ID=0x6E052820 # DAPLINK_HIC_ID_NRF52820
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- OS_CLOCK=64000000
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- __DAPLINK
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includes:
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- source/hic_hal/nordic/nrf52820
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- source/hic_hal/nordic/nrf52820/cmsis
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- source/hic_hal/nordic/nrf52820/nrfx
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- source/hic_hal/nordic/nrf52820/nrfx/drivers
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- source/hic_hal/nordic/nrf52820/nrfx/drivers/include
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- source/hic_hal/nordic/nrf52820/nrfx/hal
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- source/hic_hal/nordic/nrf52820/nrfx/mdk
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sources:
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hic_hal:
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- source/hic_hal/nordic/nrf52820
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- source/hic_hal/nordic/nrf52820/cmsis
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- source/hic_hal/nordic/nrf52820/nrfx/drivers
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tool_specific:
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uvision:
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misc:
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ld_flags:
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- --predefine="-I..\..\..\source\hic_hal\nordic\nrf52820"
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sources:
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hic_hal:
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- source/hic_hal/nordic/nrf52820/armcc
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armcc:
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sources:
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hic_hal:
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- source/hic_hal/nordic/nrf52820/armcc
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armclang:
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misc:
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common_flags:
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- -mfpu=none
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sources:
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hic_hal:
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- source/hic_hal/nordic/nrf52820/armcc
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gcc_arm:
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sources:
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hic_hal:
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- source/hic_hal/nordic/nrf52820/gcc

‎source/board/nrf52820_bl.c‎

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/**
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* @file nrf52820_bl.c
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* @brief board ID and meta-data for HIC based on Nordic Semiconductor nRF52820
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*
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* DAPLink Interface Firmware
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* Copyright (c) 2009-2021, Arm Limited, All Rights Reserved
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "target_config.h"
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#include "daplink_addr.h"
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#include "compiler.h"
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#include "target_board.h"
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#include "target_family.h"
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// Warning - changing the interface start will break backwards compatibility
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COMPILER_ASSERT(DAPLINK_ROM_IF_START == 0x00008000);
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COMPILER_ASSERT(DAPLINK_ROM_IF_SIZE == KB(92));
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/**
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* List of start and size for each size of flash sector
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* The size will apply to all sectors between the listed address and the next address
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* in the list.
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* The last pair in the list will have sectors starting at that address and ending
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* at address start + size.
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*/
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static const sector_info_t sectors_info[] = {
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{DAPLINK_ROM_IF_START, 0x1000},
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};
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// nrf52820 target information
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target_cfg_t target_device = {
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.sectors_info = sectors_info,
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.sector_info_length = (sizeof(sectors_info))/(sizeof(sector_info_t)),
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.flash_regions[0].start = DAPLINK_ROM_IF_START,
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.flash_regions[0].end = DAPLINK_ROM_IF_START + DAPLINK_ROM_IF_SIZE,
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.flash_regions[0].flags = kRegionIsDefault,
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.ram_regions[0].start = DAPLINK_RAM_START,
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.ram_regions[0].end = DAPLINK_RAM_START + DAPLINK_RAM_SIZE,
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/* .flash_algo not needed for bootloader */
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};
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// bootloader has no family
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const target_family_descriptor_t *g_target_family = NULL;
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const board_info_t g_board_info = {
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.info_version = kBoardInfoVersion,
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.board_id = "0000",
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.daplink_url_name = "HELP_FAQHTM",
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.daplink_drive_name = "MAINTENANCE",
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.daplink_target_url = "https://mbed.com/daplink",
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.target_cfg = &target_device,
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};

‎source/daplink/daplink.h‎

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#define DAPLINK_HIC_ID_LPC55XX 0x4C504355 // 'LPC\x55'
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#define DAPLINK_HIC_ID_M48SSIDAE 0x97969921
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#define DAPLINK_HIC_ID_PSOC5 0x2E127069
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#define DAPLINK_HIC_ID_NRF52820 0x6E052820 // 'n\x05\x28\x20'
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//@}
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#define DAPLINK_INFO_OFFSET 0x20

‎source/daplink/interface/swd_host.c‎

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*/
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#ifndef TARGET_MCU_CORTEX_A
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#include "device.h"
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#include "cmsis_os2.h"
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#include "target_config.h"
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#include "swd_host.h"
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#include "debug_cm.h"
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#include "DAP_config.h"
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#include "DAP.h"
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#include "target_family.h"
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#include "device.h"
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#include "swd_host.h"
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// Default NVIC and Core debug base addresses
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// TODO: Read these addresses from ROM.

‎source/daplink/interface/swd_host.h‎

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*
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* DAPLink Interface Firmware
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* Copyright (c) 2009-2019, ARM Limited, All Rights Reserved
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* Copyright 2019, Cypress Semiconductor Corporation
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* Copyright 2019, Cypress Semiconductor Corporation
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* or a subsidiary of Cypress Semiconductor Corporation.
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* SPDX-License-Identifier: Apache-2.0
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*

‎source/family/nordic/target_reset_nrf51.c‎

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* limitations under the License.
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*/
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#include "swd_host.h"
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#include "DAP_config.h"
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#include "target_family.h"
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#include "target_board.h"
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#include "swd_host.h"
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static void swd_set_target_reset_nrf(uint8_t asserted)
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{

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