|
1 | 1 | /*
|
2 | 2 | * Copyright (c) 2010 - 2021, Nordic Semiconductor ASA All rights reserved.
|
3 | 3 | *
|
| 4 | + * SPDX-License-Identifier: BSD-3-Clause |
| 5 | + * |
4 | 6 | * Redistribution and use in source and binary forms, with or without
|
5 | 7 | * modification, are permitted provided that the following conditions are met:
|
6 | 8 | *
|
|
30 | 32 | * @file nrf52.h
|
31 | 33 | * @brief CMSIS HeaderFile
|
32 | 34 | * @version 1
|
33 |
| - * @date 15. January 2021 |
34 |
| - * @note Generated by SVDConv V3.3.35 on Friday, 15.01.2021 17:02:05 |
| 35 | + * @date 29. April 2021 |
| 36 | + * @note Generated by SVDConv V3.3.35 on Thursday, 29.04.2021 12:43:45 |
35 | 37 | * from File 'nrf52.svd',
|
36 |
| - * last modified on Friday, 15.01.2021 16:02:00 |
| 38 | + * last modified on Thursday, 29.04.2021 10:43:40 |
37 | 39 | */
|
38 | 40 |
|
39 | 41 |
|
@@ -752,13 +754,33 @@ typedef struct { /*!< (@ 0x10001000) UICR Structu
|
752 | 754 | __IM uint32_t RESERVED1[64];
|
753 | 755 | __IOM uint32_t PSELRESET[2]; /*!< (@ 0x00000200) Description collection[0]: Mapping of the nRESET
|
754 | 756 | function (see POWER chapter for details) */
|
755 |
| - __IOM uint32_t APPROTECT; /*!< (@ 0x00000208) Access Port protection */ |
| 757 | + __IOM uint32_t APPROTECT; /*!< (@ 0x00000208) Access port protection */ |
756 | 758 | __IOM uint32_t NFCPINS; /*!< (@ 0x0000020C) Setting of pins dedicated to NFC functionality:
|
757 | 759 | NFC antenna or GPIO */
|
758 | 760 | } NRF_UICR_Type; /*!< Size = 528 (0x210) */
|
759 | 761 |
|
760 | 762 |
|
761 | 763 |
|
| 764 | +/* =========================================================================================================================== */ |
| 765 | +/* ================ APPROTECT ================ */ |
| 766 | +/* =========================================================================================================================== */ |
| 767 | + |
| 768 | + |
| 769 | +/** |
| 770 | + * @brief Access Port Protection (APPROTECT) |
| 771 | + */ |
| 772 | + |
| 773 | +typedef struct { /*!< (@ 0x40000000) APPROTECT Structure */ |
| 774 | + __IM uint32_t RESERVED[340]; |
| 775 | + __IOM uint32_t FORCEPROTECT; /*!< (@ 0x00000550) Software force enable APPROTECT mechanism until |
| 776 | + next reset. This register can only be written |
| 777 | + once. */ |
| 778 | + __IM uint32_t RESERVED1; |
| 779 | + __IOM uint32_t DISABLE; /*!< (@ 0x00000558) Software disable APPROTECT mechanism */ |
| 780 | +} NRF_APPROTECT_Type; /*!< Size = 1372 (0x55c) */ |
| 781 | + |
| 782 | + |
| 783 | + |
762 | 784 | /* =========================================================================================================================== */
|
763 | 785 | /* ================ BPROT ================ */
|
764 | 786 | /* =========================================================================================================================== */
|
@@ -2268,6 +2290,7 @@ typedef struct { /*!< (@ 0x50000000) P0 Structure
|
2268 | 2290 |
|
2269 | 2291 | #define NRF_FICR_BASE 0x10000000UL
|
2270 | 2292 | #define NRF_UICR_BASE 0x10001000UL
|
| 2293 | +#define NRF_APPROTECT_BASE 0x40000000UL |
2271 | 2294 | #define NRF_BPROT_BASE 0x40000000UL
|
2272 | 2295 | #define NRF_POWER_BASE 0x40000000UL
|
2273 | 2296 | #define NRF_CLOCK_BASE 0x40000000UL
|
@@ -2346,6 +2369,7 @@ typedef struct { /*!< (@ 0x50000000) P0 Structure
|
2346 | 2369 |
|
2347 | 2370 | #define NRF_FICR ((NRF_FICR_Type*) NRF_FICR_BASE)
|
2348 | 2371 | #define NRF_UICR ((NRF_UICR_Type*) NRF_UICR_BASE)
|
| 2372 | +#define NRF_APPROTECT ((NRF_APPROTECT_Type*) NRF_APPROTECT_BASE) |
2349 | 2373 | #define NRF_BPROT ((NRF_BPROT_Type*) NRF_BPROT_BASE)
|
2350 | 2374 | #define NRF_POWER ((NRF_POWER_Type*) NRF_POWER_BASE)
|
2351 | 2375 | #define NRF_CLOCK ((NRF_CLOCK_Type*) NRF_CLOCK_BASE)
|
|
0 commit comments