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1 | 1 | /**
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2 | 2 | * @file IO_Config.h
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3 |
| - * @brief |
| 3 | + * @brief |
4 | 4 | *
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5 | 5 | * DAPLink Interface Firmware
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6 | 6 | * Copyright (c) 2009-2016, ARM Limited, All Rights Reserved
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30 | 30 | #ifndef __IO_CONFIG_H__
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31 | 31 | #define __IO_CONFIG_H__
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32 | 32 |
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33 |
| -#include "MKL26Z4.h" |
| 33 | +#include "MKL27Z4.h" |
34 | 34 | #include "compiler.h"
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35 | 35 | #include "daplink.h"
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36 | 36 |
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37 |
| -// This GPIO configuration is only valid for the KL26 HIC |
38 |
| -COMPILER_ASSERT(DAPLINK_HIC_ID == DAPLINK_HIC_ID_KL26); |
| 37 | +// This GPIO configuration is only valid for the KL27 HIC |
| 38 | +COMPILER_ASSERT(DAPLINK_HIC_ID == DAPLINK_HIC_ID_KL27Z); |
39 | 39 |
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40 | 40 |
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41 | 41 | // Debug Port I/O Pins
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42 | 42 |
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43 |
| -// SWCLK Pin PTC5(C5) |
| 43 | +// SWCLK Pin PTC6 |
44 | 44 | #define PIN_SWCLK_PORT PORTC
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45 | 45 | #define PIN_SWCLK_GPIO PTC
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46 |
| -#define PIN_SWCLK_BIT (5) |
| 46 | +#define PIN_SWCLK_BIT (6) |
47 | 47 | #define PIN_SWCLK (1<<PIN_SWCLK_BIT)
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48 | 48 |
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49 |
| -// SWDIO Pin PTC6(C6) |
| 49 | +// SWDIO Pin PTC5 |
50 | 50 | #define PIN_SWDIO_PORT PORTC
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51 | 51 | #define PIN_SWDIO_GPIO PTC
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52 |
| -#define PIN_SWDIO_BIT (6) |
| 52 | +#define PIN_SWDIO_BIT (5) |
53 | 53 | #define PIN_SWDIO (1<<PIN_SWDIO_BIT)
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54 | 54 |
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55 |
| -// nRESET Pin PTC8(C8) |
56 |
| -#define PIN_nRESET_PORT PORTC |
57 |
| -#define PIN_nRESET_GPIO PTC |
58 |
| -#define PIN_nRESET_BIT (8) |
| 55 | +// nRESET Pin PTA20 |
| 56 | +#define PIN_nRESET_PORT PORTA |
| 57 | +#define PIN_nRESET_GPIO PTA |
| 58 | +#define PIN_nRESET_BIT (20) |
59 | 59 | #define PIN_nRESET (1<<PIN_nRESET_BIT)
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60 | 60 |
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61 |
| -// PWR_REG_EN PTD2 - Not connected |
62 |
| -#define PIN_POWER_EN_PORT PORTD |
63 |
| -#define PIN_POWER_EN_GPIO PTD |
64 |
| -#define PIN_POWER_EN_BIT (2) |
65 |
| -#define PIN_POWER_EN (1<<PIN_POWER_EN_BIT) |
66 |
| - |
67 |
| -// VTRG_FAULT_B PTD3 - Not connected |
68 |
| -#define PIN_VTRG_FAULT_B_PORT PORTD |
69 |
| -#define PIN_VTRG_FAULT_B_GPIO PTD |
70 |
| -#define PIN_VTRG_FAULT_B_BIT (7) |
71 |
| -#define PIN_VTRG_FAULT_B_EN (1<<PIN_VTRG_FAULT_B_BIT) |
72 |
| - |
73 | 61 | // Debug Unit LEDs
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74 | 62 |
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75 |
| -// HID_LED PTD4 |
76 |
| -#define PIN_HID_LED_PORT PORTD |
77 |
| -#define PIN_HID_LED_GPIO PTD |
78 |
| -#define PIN_HID_LED_BIT (4) |
| 63 | +// HID_LED PTB0 |
| 64 | +#define PIN_HID_LED_PORT PORTB |
| 65 | +#define PIN_HID_LED_GPIO PTB |
| 66 | +#define PIN_HID_LED_BIT (0) |
79 | 67 | #define PIN_HID_LED (1<<PIN_HID_LED_BIT)
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| 68 | +#define PIN_HID_LED_MUX_ALT (1) |
80 | 69 |
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81 |
| -// MSC_LED PTD5 |
82 |
| -#define PIN_MSC_LED_PORT PORTD |
83 |
| -#define PIN_MSC_LED_GPIO PTD |
84 |
| -#define PIN_MSC_LED_BIT (4) |
| 70 | +// MSC_LED PTB0 |
| 71 | +#define PIN_MSC_LED_PORT PORTB |
| 72 | +#define PIN_MSC_LED_GPIO PTB |
| 73 | +#define PIN_MSC_LED_BIT (0) |
85 | 74 | #define PIN_MSC_LED (1<<PIN_MSC_LED_BIT)
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| 75 | +#define PIN_MSC_LED_MUX_ALT (1) |
86 | 76 |
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87 |
| -// CDC_LED PTD6 |
88 |
| -#define PIN_CDC_LED_PORT PORTD |
89 |
| -#define PIN_CDC_LED_GPIO PTD |
90 |
| -#define PIN_CDC_LED_BIT (4) |
| 77 | +// CDC_LED PTB0 |
| 78 | +#define PIN_CDC_LED_PORT PORTB |
| 79 | +#define PIN_CDC_LED_GPIO PTB |
| 80 | +#define PIN_CDC_LED_BIT (0) |
91 | 81 | #define PIN_CDC_LED (1<<PIN_CDC_LED_BIT)
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| 82 | +#define PIN_CDC_LED_MUX_ALT (1) |
92 | 83 |
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93 |
| -// SW RESET BUTTON PTB1 |
94 |
| -#define PIN_SW_RESET_PORT PORTB |
95 |
| -#define PIN_SW_RESET_GPIO PTB |
96 |
| -#define PIN_SW_RESET_BIT (1) |
97 |
| -#define PIN_SW_RESET (1<<PIN_SW_RESET_BIT) |
98 |
| - |
99 |
| -// BOARD TYPE |
100 |
| -#define PIN_BOARD_TYPE_PORT PORTB |
101 |
| -#define PIN_BOARD_TYPE_GPIO PTB |
102 |
| -#define PIN_BOARD_TYPE_BIT (0) |
103 |
| -#define PIN_BOARD_TYPE (1<<PIN_BOARD_TYPE_BIT) |
104 |
| - |
105 |
| -// Connected LED Not available |
| 84 | +// Reset pins |
106 | 85 |
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107 |
| -// Target Running LED Not available |
| 86 | +// SW RESET BUTTON PTD4 |
| 87 | +#define PIN_SW_RESET_PORT PORTD |
| 88 | +#define PIN_SW_RESET_GPIO PTD |
| 89 | +#define PIN_SW_RESET_BIT (4) |
| 90 | +#define PIN_SW_RESET (1<<PIN_SW_RESET_BIT) |
| 91 | +#define SW_RESET_PRESSED (0) |
| 92 | +#define SW_RESET_NOT_PRESSED (1) |
108 | 93 |
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109 | 94 | // UART
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110 |
| -#define UART_PORT PORTC |
| 95 | +#define UART_PORT PORTA |
111 | 96 | #define UART_NUM (1)
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112 |
| -// RX PTC3 |
113 |
| -#define PIN_UART_RX_GPIO PTC |
114 |
| -#define PIN_UART_RX_BIT (3) |
| 97 | +// RX PTA18 |
| 98 | +#define PIN_UART_RX_GPIO PTA |
| 99 | +#define PIN_UART_RX_BIT (18) |
115 | 100 | #define PIN_UART_RX (1<<PIN_UART_RX_BIT)
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116 | 101 | #define PIN_UART_RX_MUX_ALT (3)
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117 |
| -// TX PTC4 |
118 |
| -#define PIN_UART_TX_GPIO PTC |
119 |
| -#define PIN_UART_TX_BIT (4) |
| 102 | +// TX PTA19 |
| 103 | +#define PIN_UART_TX_GPIO PTA |
| 104 | +#define PIN_UART_TX_BIT (19) |
120 | 105 | #define PIN_UART_TX (1<<PIN_UART_TX_BIT)
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121 | 106 | #define PIN_UART_TX_MUX_ALT (3)
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122 | 107 |
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123 |
| -#define UART UART1 |
124 |
| -#define UART_RX_TX_IRQn UART1_IRQn |
125 |
| -#define UART_RX_TX_IRQHandler UART1_IRQHandler |
| 108 | +#define UART LPUART1 |
| 109 | +#define UART_RX_TX_IRQn LPUART1_IRQn |
| 110 | +#define UART_RX_TX_IRQHandler LPUART1_IRQHandler |
126 | 111 |
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127 | 112 | #endif
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