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1 |
| -/* -------------------------------------------------------------------------- |
2 |
| - * Copyright (c) 2013-2016 Arm Limited (or its affiliates). All |
| 1 | +/* -------------------------------------------------------------------------- |
| 2 | + * Copyright (c) 2013-2016 Arm Limited (or its affiliates). All |
3 | 3 | * rights reserved.
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4 | 4 | *
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5 | 5 | * SPDX-License-Identifier: Apache-2.0
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1125 | 1125 | // </e> USART0 (Universal synchronous asynchronous receiver transmitter) [Driver_USART0]
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1126 | 1126 |
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1127 | 1127 | // <e> UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
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1128 |
| -#define RTE_UART1 0 |
| 1128 | +#define RTE_UART1 1 |
1129 | 1129 |
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1130 | 1130 | // <h> Pin Configuration
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1131 | 1131 | // <o> TX <0=>Not used <1=>P1_13 <2=>P3_4 <3=>P5_6 <4=>PC_13 <5=>PE_11
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1132 | 1132 | // <i> UART0 Serial Output pin
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1133 |
| -#define RTE_UART1_TX_ID 2 |
| 1133 | +#define RTE_UART1_TX_ID 0 |
1134 | 1134 | #if (RTE_UART1_TX_ID == 0)
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1135 | 1135 | #define RTE_UART1_TX_PIN_EN 0
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1136 | 1136 | #elif (RTE_UART1_TX_ID == 1)
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1193 | 1193 |
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1194 | 1194 | // <h> Modem Lines
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1195 | 1195 | // <o> CTS <0=>Not used <1=>P1_11 <2=>P5_4 <3=>PC_2 <4=>PE_7
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1196 |
| -#define RTE_UART1_CTS_ID 1 |
| 1196 | +#define RTE_UART1_CTS_ID 0 |
1197 | 1197 | #if (RTE_UART1_CTS_ID == 0)
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1198 | 1198 | #define RTE_UART1_CTS_PIN_EN 0
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1199 | 1199 | #elif (RTE_UART1_CTS_ID == 1)
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1219 | 1219 | #define RTE_UART1_CTS_PIN_EN 1
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1220 | 1220 | #endif
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1221 | 1221 | // <o> RTS <0=>Not used <1=>P1_9 <2=>P5_2 <3=>PC_3 <4=>PE_5
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1222 |
| -#define RTE_UART1_RTS_ID 1 |
| 1222 | +#define RTE_UART1_RTS_ID 0 |
1223 | 1223 | #if (RTE_UART1_RTS_ID == 0)
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1224 | 1224 | #define RTE_UART1_RTS_PIN_EN 0
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1225 | 1225 | #elif (RTE_UART1_RTS_ID == 1)
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1245 | 1245 | #define RTE_UART1_RTS_PIN_EN 1
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1246 | 1246 | #endif
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1247 | 1247 | // <o> DCD <0=>Not used <1=>P1_12 <2=>P5_5 <3=>PC_11 <4=>PE_9
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1248 |
| -#define RTE_UART1_DCD_ID 1 |
| 1248 | +#define RTE_UART1_DCD_ID 0 |
1249 | 1249 | #if (RTE_UART1_DCD_ID == 0)
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1250 | 1250 | #define RTE_UART1_DCD_PIN_EN 0
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1251 | 1251 | #elif (RTE_UART1_DCD_ID == 1)
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1271 | 1271 | #define RTE_UART1_DCD_PIN_EN 1
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1272 | 1272 | #endif
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1273 | 1273 | // <o> DSR <0=>Not used <1=>P1_7 <2=>P5_0 <3=>PC_10 <4=>PE_8
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1274 |
| -#define RTE_UART1_DSR_ID 1 |
| 1274 | +#define RTE_UART1_DSR_ID 0 |
1275 | 1275 | #if (RTE_UART1_DSR_ID == 0)
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1276 | 1276 | #define RTE_UART1_DSR_PIN_EN 0
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1277 | 1277 | #elif (RTE_UART1_DSR_ID == 1)
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1297 | 1297 | #define RTE_UART1_DSR_PIN_EN 1
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1298 | 1298 | #endif
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1299 | 1299 | // <o> DTR <0=>Not used <1=>P1_8 <2=>P5_1 <3=>PC_12 <4=>PE_10
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1300 |
| -#define RTE_UART1_DTR_ID 1 |
| 1300 | +#define RTE_UART1_DTR_ID 0 |
1301 | 1301 | #if (RTE_UART1_DTR_ID == 0)
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1302 | 1302 | #define RTE_UART1_DTR_PIN_EN 0
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1303 | 1303 | #elif (RTE_UART1_DTR_ID == 1)
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1323 | 1323 | #define RTE_UART1_DTR_PIN_EN 1
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1324 | 1324 | #endif
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1325 | 1325 | // <o> RI <0=>Not used <1=>P1_10 <2=>P5_3 <3=>PC_1 <4=>PE_6
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1326 |
| -#define RTE_UART1_RI_ID 1 |
| 1326 | +#define RTE_UART1_RI_ID 0 |
1327 | 1327 | #if (RTE_UART1_RI_ID == 0)
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1328 | 1328 | #define RTE_UART1_RI_PIN_EN 0
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1329 | 1329 | #elif (RTE_UART1_RI_ID == 1)
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