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Cruz Monrreal
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Merge pull request #7241 from LMESTM/Fix_DeepsleepStackUsage
STM32: Reduce HAL_deepsleep stack usage
2 parents 585558c + 81adafb commit 093b4f0

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targets/TARGET_STM/sleep.c

Lines changed: 47 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -49,38 +49,16 @@ static void wait_loop(uint32_t timeout)
4949
return;
5050
}
5151

52+
5253
// On L4 platforms we've seen unstable PLL CLK configuraiton
5354
// when DEEP SLEEP exits just few µs after being entered
5455
// So we need to force MSI usage before setting clocks again
55-
static void ForceClockOutofDeepSleep(void)
56+
static void ForcePeriphOutofDeepSleep(void)
5657
{
57-
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
58-
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
5958
uint32_t pFLatency = 0;
60-
61-
/* Enable Power Control clock */
62-
__HAL_RCC_PWR_CLK_ENABLE();
63-
64-
#ifdef PWR_FLAG_VOS
65-
/* Poll VOSF bit of in PWR_CSR. Wait until it is reset to 0 */
66-
//while (__HAL_PWR_GET_FLAG(PWR_FLAG_VOS) != RESET) {};
67-
#endif
68-
69-
/* Get the Oscillators configuration according to the internal RCC registers */
70-
HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
59+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
7160

7261
#if (TARGET_STM32L4 || TARGET_STM32L1) /* MSI used for L4 */
73-
/**Initializes the CPU, AHB and APB busses clocks
74-
*/
75-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
76-
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
77-
RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
78-
RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_4; // Intermediate freq, 1MHz range
79-
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
80-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
81-
error("clock issue\r\n");
82-
}
83-
8462
/* Get the Clocks configuration according to the internal RCC registers */
8563
HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &pFLatency);
8664

@@ -100,16 +78,6 @@ static void ForceClockOutofDeepSleep(void)
10078
error("clock issue\r\n");
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}
10280
#else /* HSI used on others */
103-
/**Initializes the CPU, AHB and APB busses clocks
104-
*/
105-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
106-
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
107-
RCC_OscInitStruct.HSICalibrationValue = 16;
108-
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
109-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
110-
error("clock issue");
111-
}
112-
11381
/* Get the Clocks configuration according to the internal RCC registers */
11482
HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &pFLatency);
11583

@@ -132,6 +100,50 @@ static void ForceClockOutofDeepSleep(void)
132100
#endif // TARGET_STM32L4
133101
}
134102

103+
static void ForceOscOutofDeepSleep(void)
104+
{
105+
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
106+
107+
/* Enable Power Control clock */
108+
__HAL_RCC_PWR_CLK_ENABLE();
109+
110+
/* Get the Oscillators configuration according to the internal RCC registers */
111+
HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
112+
113+
#if (TARGET_STM32L4 || TARGET_STM32L1) /* MSI used for L4 */
114+
/**Initializes the CPU, AHB and APB busses clocks
115+
*/
116+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
117+
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
118+
RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
119+
RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_4; // Intermediate freq, 1MHz range
120+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
121+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
122+
error("clock issue\r\n");
123+
}
124+
#else /* HSI used on others */
125+
/**Initializes the CPU, AHB and APB busses clocks
126+
*/
127+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
128+
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
129+
RCC_OscInitStruct.HSICalibrationValue = 16;
130+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
131+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
132+
error("clock issue");
133+
}
134+
#endif // TARGET_STM32L4
135+
}
136+
137+
/* The content of this function has been split into 2 separate functions
138+
so that the involved structures are not allocated on the stack in parallel.
139+
This will reduce the maximum stack usage in case on non-optimized / debug
140+
compilers settings */
141+
static void ForceClockOutofDeepSleep(void)
142+
{
143+
ForceOscOutofDeepSleep();
144+
ForcePeriphOutofDeepSleep();
145+
}
146+
135147
void hal_sleep(void)
136148
{
137149
// Disable IRQs

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