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theotherjimmytheotherjimmy
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Merge pull request #4840 from ganesh-ramachandran/master
Add Support for TOSHIBA TMPM066 board
2 parents dd0a0fc + f79216c commit 0a063a0

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‎targets/TARGET_TOSHIBA/TARGET_TMPM066/Periph_Driver/inc/tmpm066_adc.h

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/**
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*******************************************************************************
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* @file tmpm066_adc.h
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* @brief This file provides all the functions prototypes for ADC driver.
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* @version V2.0.2.1
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* @date 2015/10/09
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*
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* (C)Copyright TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION 2017 All rights reserved
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*******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __TMPM066_ADC_H
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#define __TMPM066_ADC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "TMPM066.h"
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#include "tx00_common.h"
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#if defined(__TMPM066_ADC_H)
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/** @addtogroup TX00_Periph_Driver
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* @{
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*/
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/** @addtogroup ADC
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* @{
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*/
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/** @defgroup ADC_Exported_Types
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* @{
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*/
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#define ADC_CONVERSION_35_CLOCK ((uint32_t)0x00000000) /* 35.5 conversion clock */
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#define ADC_CONVERSION_42_CLOCK ((uint32_t)0x00000040) /* 42 conversion clock */
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#define ADC_CONVERSION_68_CLOCK ((uint32_t)0x00000080) /* 68 conversion clock */
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#define ADC_CONVERSION_81_CLOCK ((uint32_t)0x000000C0) /* 81 conversion clock */
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#define IS_ADC_CONVERSION_TIME(param) (((param) == ADC_CONVERSION_35_CLOCK) || \
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((param) == ADC_CONVERSION_42_CLOCK) || \
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((param) == ADC_CONVERSION_68_CLOCK) || \
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((param) == ADC_CONVERSION_81_CLOCK))
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#define ADC_FC_DIVIDE_LEVEL_1 ((uint32_t)0x00000000)
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#define ADC_FC_DIVIDE_LEVEL_2 ((uint32_t)0x00000001)
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#define ADC_FC_DIVIDE_LEVEL_4 ((uint32_t)0x00000002)
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#define ADC_FC_DIVIDE_LEVEL_6 ((uint32_t)0x00000008)
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#define ADC_FC_DIVIDE_LEVEL_8 ((uint32_t)0x00000003)
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#define ADC_FC_DIVIDE_LEVEL_12 ((uint32_t)0x00000009)
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#define ADC_FC_DIVIDE_LEVEL_16 ((uint32_t)0x00000004)
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#define ADC_FC_DIVIDE_LEVEL_24 ((uint32_t)0x0000000A)
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#define ADC_FC_DIVIDE_LEVEL_48 ((uint32_t)0x0000000B)
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#define ADC_FC_DIVIDE_LEVEL_96 ((uint32_t)0x0000000C)
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#define IS_ADC_PRESCALER(param) (((param) == ADC_FC_DIVIDE_LEVEL_1) || \
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((param) == ADC_FC_DIVIDE_LEVEL_2) || \
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((param) == ADC_FC_DIVIDE_LEVEL_4) || \
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((param) == ADC_FC_DIVIDE_LEVEL_6) || \
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((param) == ADC_FC_DIVIDE_LEVEL_8) || \
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((param) == ADC_FC_DIVIDE_LEVEL_12) || \
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((param) == ADC_FC_DIVIDE_LEVEL_16) || \
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((param) == ADC_FC_DIVIDE_LEVEL_24) || \
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((param) == ADC_FC_DIVIDE_LEVEL_48) || \
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((param) == ADC_FC_DIVIDE_LEVEL_96))
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#define ADC_INT_SINGLE ((uint32_t)0x00000000)
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#define ADC_INT_CONVERSION_4 ((uint32_t)0x00000008)
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#define ADC_INT_CONVERSION_8 ((uint32_t)0x00000010)
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#define IS_ADC_INT_MODE(param) (((param) == ADC_INT_SINGLE) || \
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((param) == ADC_INT_CONVERSION_4) || \
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((param) == ADC_INT_CONVERSION_8))
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#define ADC_AN_0 ((uint32_t)0x00000000)
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#define ADC_AN_1 ((uint32_t)0x00000001)
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#define ADC_AN_2 ((uint32_t)0x00000002)
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#define ADC_AN_3 ((uint32_t)0x00000003)
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#define ADC_AN_4 ((uint32_t)0x00000004)
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#define ADC_AN_5 ((uint32_t)0x00000005)
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#define ADC_AN_6 ((uint32_t)0x00000006)
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#define ADC_AN_7 ((uint32_t)0x00000007)
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#define IS_ADC_INPUT_CH(param) (((param) == ADC_AN_0) || \
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((param) == ADC_AN_1) || \
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((param) == ADC_AN_2) || \
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((param) == ADC_AN_3) || \
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((param) == ADC_AN_4) || \
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((param) == ADC_AN_5) || \
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((param) == ADC_AN_6) || \
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((param) == ADC_AN_7))
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#define ADC_CMP_0 ((uint8_t)0x00)
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#define ADC_CMP_1 ((uint8_t)0x01)
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#define IS_ADC_CMP(param) (((param) == ADC_CMP_0) || \
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((param) == ADC_CMP_1))
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#define ADC_REG_0 ((uint32_t)0x00000000)
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#define ADC_REG_1 ((uint32_t)0x00000001)
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#define ADC_REG_2 ((uint32_t)0x00000002)
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#define ADC_REG_3 ((uint32_t)0x00000003)
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#define ADC_REG_4 ((uint32_t)0x00000004)
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#define ADC_REG_5 ((uint32_t)0x00000005)
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#define ADC_REG_6 ((uint32_t)0x00000006)
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#define ADC_REG_7 ((uint32_t)0x00000007)
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#define ADC_REG_SP ((uint32_t)0x00000008)
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#define IS_ADC_REG(param) ((param) <= ADC_REG_SP)
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#define IS_ADC_RESULT_CMP_REG(param) ((param) <= ADC_REG_SP)
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#define ADC_EXT_TRG ((uint32_t)0x00000000)
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#define ADC_MATCH_TB_0 ((uint32_t)0x00000020)
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#define IS_ADC_HW_TRG_NORMAL(param) (((param) == ADC_EXT_TRG) || \
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((param) == ADC_MATCH_TB_0))
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#define ADC_MATCH_TB_1 ((uint32_t)0x00000080)
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#define IS_ADC_HW_TRG_TOP(param) (((param) == ADC_EXT_TRG) || \
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((param) == ADC_MATCH_TB_1))
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#define IS_ADC_CMP_VALUE(param) ((param) <= (uint16_t)0x03ff)
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typedef enum {
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ADC_NO_OVERRUN = 0U,
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ADC_OVERRUN = 1U
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} ADC_OverrunState;
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typedef enum {
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ADC_SCAN_4CH = 0U,
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ADC_SCAN_8CH = 1U
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} ADC_ChannelScanMode;
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#define IS_ADC_CH_SCAN_MODE(param) (((param) == ADC_SCAN_4CH) || \
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((param) == ADC_SCAN_8CH))
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typedef enum {
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ADC_COMPARISON_SMALLER = 0U,
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ADC_COMPARISON_LARGER = 1U
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} ADC_ComparisonState;
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#define IS_ADC_CMP_INT(param) (((param) == ADC_COMPARISON_SMALLER) || \
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((param) == ADC_COMPARISON_LARGER))
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typedef struct {
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WorkState ADCResultStored; /*!< ADC result storage flag */
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ADC_OverrunState ADCOverrunState; /*!< ADC overrun flag */
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uint16_t ADCResultValue; /*!< ADC result value */
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} ADC_ResultTypeDef;
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#define ADC_DMA_REQ_NORMAL ((uint8_t)0x00)
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#define ADC_DMA_REQ_TOP ((uint8_t)0x01)
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#define ADC_DMA_REQ_MONITOR1 ((uint8_t)0x02)
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#define ADC_DMA_REQ_MONITOR2 ((uint8_t)0x03)
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#define IS_ADC_DMA_REQ(param) ((param) <= ADC_DMA_REQ_MONITOR2)
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typedef union {
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uint32_t All;
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struct {
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uint32_t NormalBusy:1; /*!< bit0, Normal A/D conversion busy flag (MOD0<ADBFN>) */
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uint32_t NormalComplete:1; /*!< bit1, Normal AD conversion complete flag (MOD0<EOCFN>) */
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uint32_t TopBusy:1; /*!< bit2, Top-priority A/D conversion busy flag (MOD2<ADBFHP>) */
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uint32_t TopComplete:1; /*!< bit3, Top-priority AD conversion complete flag (MOD2<EOCFHP>) */
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uint32_t Reserved:28; /*!< bit4 to bit 31, reserved */
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} Bit;
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} ADC_State;
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/** @} */
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/* End of group ADC_Exported_Types */
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/** @defgroup ADC_Exported_FunctionPrototypes
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* @{
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*/
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void ADC_SWReset(void);
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void ADC_SetClk(uint32_t Conversion_Time, uint32_t Prescaler_Output);
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void ADC_Start(void);
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void ADC_SetScanMode(FunctionalState NewState);
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void ADC_SetRepeatMode(FunctionalState NewState);
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void ADC_SetINTMode(uint32_t INTMode);
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ADC_State ADC_GetConvertState(void);
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void ADC_SetInputChannel(uint32_t InputChannel);
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void ADC_SetChannelScanMode(ADC_ChannelScanMode ScanMode);
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void ADC_SetIdleMode(FunctionalState NewState);
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void ADC_SetVref(FunctionalState NewState);
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void ADC_SetInputChannelTop(uint32_t TopInputChannel);
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void ADC_StartTopConvert(void);
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void ADC_SetMonitor(uint8_t ADCMPx, FunctionalState NewState);
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void ADC_SetResultCmpReg(uint8_t ADCMPx, uint32_t ResultComparison);
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void ADC_SetMonitorINT(uint8_t ADCMPx, ADC_ComparisonState NewState);
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void ADC_SetHWTrg(uint32_t HwSource, FunctionalState NewState);
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void ADC_SetHWTrgTop(uint32_t HwSource, FunctionalState NewState);
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ADC_ResultTypeDef ADC_GetConvertResult(uint32_t ADREGx);
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void ADC_SetCmpValue(uint8_t ADCMPx, uint16_t value);
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void ADC_SetDMAReq(uint8_t DMAReq, FunctionalState NewState);
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/** @} */
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/* End of group ADC_Exported_FunctionPrototypes */
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/** @} */
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/* End of group ADC */
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/** @} */
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/* End of group TX00_Periph_Driver */
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#endif /* (__TMPM066_ADC_H) */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __TMPM066_ADC_H */

‎targets/TARGET_TOSHIBA/TARGET_TMPM066/Periph_Driver/inc/tmpm066_cg.h

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/**
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*******************************************************************************
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* @file tmpm066_cg.h
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* @brief This file provides all the functions prototypes for CG driver.
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* @version V2.0.2.1
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* @date 2015/09/29
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*
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* (C)Copyright TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION 2017 All rights reserved
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*******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __TMPM066_CG_H
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#define __TMPM066_CG_H
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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/* Includes ------------------------------------------------------------------*/
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#include "TMPM066.h"
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#include "tx00_common.h"
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/** @addtogroup TX00_Periph_Driver
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* @{
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*/
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/** @addtogroup CG
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* @{
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*/
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/** @addtogroup CG_Exported_types
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* @{
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*/
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typedef enum {
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CG_DIVIDE_1 = 0U,
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CG_DIVIDE_2 = 1U,
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CG_DIVIDE_4 = 2U,
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CG_DIVIDE_8 = 3U,
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CG_DIVIDE_16 = 4U,
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CG_DIVIDE_32 = 5U,
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CG_DIVIDE_64 = 6U,
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CG_DIVIDE_128 = 7U,
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CG_DIVIDE_256 = 8U,
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CG_DIVIDE_512 = 9U,
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CG_DIVIDE_UNKNOWN = 10U,
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CG_DIVIDE_MAX = 16U
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} CG_DivideLevel;
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#define IS_CG_GEAR_DIVIDE_LEVEL(param) (((param) == CG_DIVIDE_1) || \
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((param) == CG_DIVIDE_2) || \
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((param) == CG_DIVIDE_4) || \
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((param) == CG_DIVIDE_8) || \
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((param) == CG_DIVIDE_16))
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#define IS_CG_DIVIDE_FC_LEVEL(param) (((param) == CG_DIVIDE_1) || \
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((param) == CG_DIVIDE_2) || \
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((param) == CG_DIVIDE_4) || \
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((param) == CG_DIVIDE_8) || \
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((param) == CG_DIVIDE_16) || \
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((param) == CG_DIVIDE_32) || \
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((param) == CG_DIVIDE_64)|| \
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((param) == CG_DIVIDE_128) || \
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((param) == CG_DIVIDE_256) || \
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((param) == CG_DIVIDE_512))
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typedef enum {
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CG_FOSC_OSC_INT = 0U,
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CG_FOSC_OSC_EXT = 1U,
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CG_FOSC_CLKIN_EXT = 2U
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} CG_FoscSrc;
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#define IS_CG_FOSC_SRC(param) (((param) == CG_FOSC_OSC_EXT) || \
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((param) == CG_FOSC_OSC_INT) || \
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((param) == CG_FOSC_CLKIN_EXT))
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#define IS_CG_FOSC_STATE(param) (((param) == CG_FOSC_OSC_EXT) || \
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((param) == CG_FOSC_OSC_INT) )
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typedef enum {
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CG_WARM_UP_SRC_OSC_INT_HIGH = 0U,
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CG_WARM_UP_SRC_OSC_EXT_HIGH = 1U,
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} CG_WarmUpSrc;
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#define IS_CG_WARM_UP_SRC(param) (((param) == CG_WARM_UP_SRC_OSC_INT_HIGH) || \
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((param) == CG_WARM_UP_SRC_OSC_EXT_HIGH))
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typedef enum {
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CG_FC_SRC_FOSC = 0U,
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CG_FC_SRC_FPLL = 1U
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} CG_FcSrc;
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#define IS_CG_FC_SRC(param) (((param) == CG_FC_SRC_FOSC) || \
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((param) == CG_FC_SRC_FPLL))
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#define CG_8M_MUL_12_FPLL (0x00C60B00UL<<8U) /* 12 fold, input 8MHz, output 96MHz */
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#define CG_10M_MUL_8_FPLL (0x00C60700UL<<8U) /* 10 fold, input 10MHz, output 80MHz */
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#define CG_12M_MUL_8_FPLL (0x00C60700UL<<8U) /* 12 fold, input 12MHz, output 96MHz */
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#define CG_16M_MUL_6_FPLL (0x00C60500UL<<8U) /* 16 fold, input 16MHz, output 96MHz */
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#define IS_CG_FPLL_VALUE(param) (((param) == CG_8M_MUL_12_FPLL) || \
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((param) == CG_10M_MUL_8_FPLL) || \
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((param) == CG_12M_MUL_8_FPLL) || \
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((param) == CG_16M_MUL_6_FPLL))
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typedef enum {
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CG_STBY_MODE_IDLE = 0U,
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CG_STBY_MODE_STOP1 = 1U,
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CG_STBY_MODE_UNKNOWN = 2U,
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CG_STBY_MODE_MAX = 4U
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} CG_STBYMode;
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#define IS_CG_STBY_MODE(param) (((param) == CG_STBY_MODE_STOP1) || \
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((param) == CG_STBY_MODE_IDLE))
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#define CG_FC_PERIPH_PORTH (0x00000001U << 7U)
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#define CG_FC_PERIPH_PORTJ (0x00000001U << 8U)
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#define CG_FC_PERIPH_TMRB0_3 (0x00000001U << 9U)
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#define CG_FC_PERIPH_TMRB4_6 (0x00000001U << 10U)
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#define CG_FC_PERIPH_TMR16A (0x00000001U << 11U)
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#define CG_FC_PERIPH_I2C0 (0x00000001U << 12U)
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#define CG_FC_PERIPH_SIO0 (0x00000001U << 13U)
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#define CG_FC_PERIPH_TSPI (0x00000001U << 14U)
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#define CG_FC_PERIPH_DMAC (0x00000001U << 15U)
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#define CG_FC_PERIPH_ADC (0x00000001U << 16U)
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#define CG_FC_PERIPH_USBD (0x00000001U << 17U)
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#define CG_FC_PERIPH_TMRD (0x00000001U << 18U)
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#define CG_FC_PERIPHA_ALL (0xFFFFFFFFU)
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#define IS_CG_FC_PERIPHA(param) ( ((param) >= CG_FC_PERIPH_PORTH) && ((param) <= CG_FC_PERIPH_TMRD ))
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#define CG_FC_PERIPH_TMRB7 (0x00000001U << 28U)
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#define CG_FC_PERIPH_SIO1 (0x00000001U << 29U)
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#define CG_FC_PERIPH_WDT (0x00000001U << 30U)
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#define CG_FC_PERIPH_I2C1 (0x00000001U << 31U)
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#define CG_FC_PERIPHB_ALL (0xFFFFFFFFU)
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#define IS_CG_FC_PERIPHB(param) (((param) >= CG_FC_PERIPH_TMRB7))
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#define CG_FPLL_PERIPH_TMRD (0x00000001U << 5U)
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#define CG_EHCLKSEL_8_24_48MHZ (0x00000001U << 4U)
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#define CG_USBSEL_PLL_CLOCKIN (0x00000001U << 1U)
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#define CG_USBENA_USB (0x00000001U)
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#define CG_FPLL_OPTIONAL_ALL (0x0FFFFFFFU)
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#define IS_CG_FPLL_OPTIONAL(param) (((param) > 0U) && ((param) <= CG_FPLL_OPTIONAL_ALL))
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/** @} */
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/* End of group CG_Exported_types */
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/** @defgroup CG_Exported_FunctionPrototypes
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* @{
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*/
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void CG_SetFgearLevel(CG_DivideLevel DivideFgearFromFc);
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CG_DivideLevel CG_GetFgearLevel(void);
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Result CG_SetPhiT0Level(CG_DivideLevel DividePhiT0FromFc);
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CG_DivideLevel CG_GetPhiT0Level(void);
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void CG_SetWarmUpTime(CG_WarmUpSrc Source, uint16_t Time);
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void CG_StartWarmUp(void);
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WorkState CG_GetWarmUpState(void);
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Result CG_SetFPLLValue(uint32_t NewValue);
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uint32_t CG_GetFPLLValue(void);
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Result CG_SetPLL(FunctionalState NewState);
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FunctionalState CG_GetPLLState(void);
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void CG_SetFoscSrc(CG_FoscSrc Source);
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CG_FoscSrc CG_GetFoscSrc(void);
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void CG_SetSTBYMode(CG_STBYMode Mode);
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CG_STBYMode CG_GetSTBYMode(void);
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void CG_SetFcSrc(CG_FcSrc Source);
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CG_FcSrc CG_GetFcSrc(void);
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void CG_SetProtectCtrl(FunctionalState NewState);
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void CG_SetFcPeriphA(uint32_t Periph, FunctionalState NewState);
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void CG_SetFcPeriphB(uint32_t Periph, FunctionalState NewState);
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void CG_SetFcOptional(uint32_t Periph, FunctionalState NewState);
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void CG_SetADCClkSupply(FunctionalState NewState);
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/** @} */
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/* End of group CG_Exported_FunctionPrototype */
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/** @} */
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/* End of group CG */
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/** @} */
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/* End of group TX00_Periph_Driver */
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* __TMPM066_CG_H */

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