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3223 | 3223 | // <e> NRFX_SPIM_ENABLED - nrfx_spim - SPIM peripheral driver
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3224 | 3224 | //==========================================================
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3225 | 3225 | #ifndef NRFX_SPIM_ENABLED
|
3226 |
| -#define NRFX_SPIM_ENABLED 1 |
| 3226 | +#define NRFX_SPIM_ENABLED 0 |
3227 | 3227 | #endif
|
3228 | 3228 | // <q> NRFX_SPIM0_ENABLED - Enable SPIM0 instance
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3229 | 3229 |
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3230 | 3230 |
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3231 | 3231 | #ifndef NRFX_SPIM0_ENABLED
|
3232 |
| -#define NRFX_SPIM0_ENABLED 1 |
| 3232 | +#define NRFX_SPIM0_ENABLED 0 |
3233 | 3233 | #endif
|
3234 | 3234 |
|
3235 | 3235 | // <q> NRFX_SPIM1_ENABLED - Enable SPIM1 instance
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3236 | 3236 |
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3237 | 3237 |
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3238 | 3238 | #ifndef NRFX_SPIM1_ENABLED
|
3239 |
| -#define NRFX_SPIM1_ENABLED 1 |
| 3239 | +#define NRFX_SPIM1_ENABLED 0 |
3240 | 3240 | #endif
|
3241 | 3241 |
|
3242 | 3242 | // <q> NRFX_SPIM2_ENABLED - Enable SPIM2 instance
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3243 | 3243 |
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3244 | 3244 |
|
3245 | 3245 | #ifndef NRFX_SPIM2_ENABLED
|
3246 |
| -#define NRFX_SPIM2_ENABLED 1 |
| 3246 | +#define NRFX_SPIM2_ENABLED 0 |
3247 | 3247 | #endif
|
3248 | 3248 |
|
3249 | 3249 | // <q> NRFX_SPIM3_ENABLED - Enable SPIM3 instance
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3250 | 3250 |
|
3251 | 3251 |
|
3252 | 3252 | #ifndef NRFX_SPIM3_ENABLED
|
3253 |
| -#define NRFX_SPIM3_ENABLED 1 |
| 3253 | +#define NRFX_SPIM3_ENABLED 0 |
3254 | 3254 | #endif
|
3255 | 3255 |
|
3256 | 3256 | // <q> NRFX_SPIM_EXTENDED_ENABLED - Enable extended SPIM features
|
|
3450 | 3450 | //==========================================================
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3451 | 3451 |
|
3452 | 3452 | #ifndef NRFX_SPI_ENABLED
|
3453 |
| -#define NRFX_SPI_ENABLED 0 |
| 3453 | +#define NRFX_SPI_ENABLED 1 |
3454 | 3454 | #endif
|
3455 | 3455 | // <q> NRFX_SPI0_ENABLED - Enable SPI0 instance
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3456 | 3456 |
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3457 | 3457 |
|
3458 | 3458 | #ifndef NRFX_SPI0_ENABLED
|
3459 |
| -#define NRFX_SPI0_ENABLED 0 |
| 3459 | +#define NRFX_SPI0_ENABLED 1 |
3460 | 3460 | #endif
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3461 | 3461 |
|
3462 | 3462 | // <q> NRFX_SPI1_ENABLED - Enable SPI1 instance
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3463 | 3463 |
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3464 | 3464 |
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3465 | 3465 | #ifndef NRFX_SPI1_ENABLED
|
3466 |
| -#define NRFX_SPI1_ENABLED 0 |
| 3466 | +#define NRFX_SPI1_ENABLED 1 |
3467 | 3467 | #endif
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3468 | 3468 |
|
3469 | 3469 | // <q> NRFX_SPI2_ENABLED - Enable SPI2 instance
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3470 | 3470 |
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3471 | 3471 |
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3472 | 3472 | #ifndef NRFX_SPI2_ENABLED
|
3473 |
| -#define NRFX_SPI2_ENABLED 0 |
| 3473 | +#define NRFX_SPI2_ENABLED 1 |
3474 | 3474 | #endif
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3475 | 3475 |
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3476 | 3476 | // <o> NRFX_SPI_MISO_PULL_CFG - MISO pin pull configuration.
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