|
2139 | 2139 | }
|
2140 | 2140 | }
|
2141 | 2141 | },
|
2142 |
| - "EFR32MG1P132f256GM48": { |
| 2142 | + "EFR32MG1P132F256GM48": { |
2143 | 2143 | "inherits": ["EFM32"],
|
2144 | 2144 | "extra_labels_add": ["EFR32", "EFR32MG1", "256K", "SL_RAIL"],
|
2145 | 2145 | "core": "Cortex-M4F",
|
2146 |
| - "macros": ["EFR32MG1P132f256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"], |
| 2146 | + "macros": ["EFR32MG1P132F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"], |
2147 | 2147 | "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
|
2148 | 2148 | "release_versions": ["2", "5"],
|
2149 |
| - "device_name": "EFR32MG1P132f256GM48", |
| 2149 | + "device_name": "EFR32MG1P132F256GM48", |
2150 | 2150 | "public": false
|
2151 | 2151 | },
|
2152 | 2152 | "EFR32MG1P233F256GM48": {
|
|
2160 | 2160 | "public": false
|
2161 | 2161 | },
|
2162 | 2162 | "EFR32MG1_BRD4150": {
|
2163 |
| - "inherits": ["EFR32MG1P132f256GM48"], |
| 2163 | + "inherits": ["EFR32MG1P132F256GM48"], |
2164 | 2164 | "device_has": ["AES", "SHA", "ECC", "SL_PTI", "RF_2P4GHZ", "RF_SUBGHZ", "ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
|
2165 | 2165 | "forced_reset_timeout": 2,
|
2166 | 2166 | "config": {
|
|
2205 | 2205 | "THUNDERBOARD_SENSE": {
|
2206 | 2206 | "inherits": ["EFR32MG1P233F256GM48"],
|
2207 | 2207 | "device_has": ["AES", "SHA", "ECC", "SL_PTI", "RF_2P4GHZ", "ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
|
2208 |
| - "forced_reset_timeout": 2, |
| 2208 | + "forced_reset_timeout": 5, |
2209 | 2209 | "config": {
|
2210 | 2210 | "hf_clock_src": {
|
2211 | 2211 | "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
|
|
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