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[M2351] Support PWM out
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+236
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4 files changed

+236
-2
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targets/TARGET_NUVOTON/TARGET_M2351/device/StdDriver/m2351_epwm.c

Lines changed: 22 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -103,6 +103,26 @@ uint32_t EPWM_ConfigCaptureChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_
103103
* To change duty cycle later, it should get the configured period value and calculate the new comparator value.
104104
*/
105105
uint32_t EPWM_ConfigOutputChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint32_t u32DutyCycle)
106+
{
107+
return EPWM_ConfigOutputChannel2(epwm, u32ChannelNum, u32Frequency, u32DutyCycle, 1);
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}
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/**
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* @brief This function Configure EPWM generator and get the nearest frequency in edge aligned(up counter type) auto-reload mode
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* @param[in] epwm The pointer of the specified EPWM module
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* - EPWM0 : EPWM Group 0
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* - EPWM1 : EPWM Group 1
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* @param[in] u32ChannelNum EPWM channel number. Valid values are between 0~5
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* @param[in] u32Frequency Target generator frequency
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* @param[in] u32DutyCycle Target generator duty cycle percentage. Valid range are between 0 ~ 100. 10 means 10%, 20 means 20%...
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* @param[in] u32Frequency2 Target generator frequency = u32Frequency / u32Frequency2
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* @return Nearest frequency clock in nano second
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* @note Since every two channels, (0 & 1), (2 & 3), shares a prescaler. Call this API to configure EPWM frequency may affect
121+
* existing frequency of other channel.
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* @note This function is used for initial stage.
123+
* To change duty cycle later, it should get the configured period value and calculate the new comparator value.
124+
*/
125+
uint32_t EPWM_ConfigOutputChannel2(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint32_t u32DutyCycle, uint32_t u32Frequency2)
106126
{
107127
uint32_t u32PWMClockSrc;
108128
uint32_t i;
@@ -120,7 +140,8 @@ uint32_t EPWM_ConfigOutputChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t
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121141
for(u16Prescale = 1U; u16Prescale < 0xFFFU; u16Prescale++)/* prescale could be 0~0xFFF */
122142
{
123-
i = (u32PWMClockSrc / u32Frequency) / u16Prescale;
143+
// Note: Support frequency < 1
144+
i = (uint64_t) u32PWMClockSrc * u32Frequency2 / u32Frequency / u16Prescale;
124145
/* If target value is larger than CNR, need to use a larger prescaler */
125146
if(i <= (0x10000U))
126147
{

targets/TARGET_NUVOTON/TARGET_M2351/device/StdDriver/m2351_epwm.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -541,6 +541,11 @@ extern "C"
541541
/*---------------------------------------------------------------------------------------------------------*/
542542
uint32_t EPWM_ConfigCaptureChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32UnitTimeNsec, uint32_t u32CaptureEdge);
543543
uint32_t EPWM_ConfigOutputChannel(EPWM_T *epwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint32_t u32DutyCycle);
544+
uint32_t EPWM_ConfigOutputChannel2(EPWM_T *epwm,
545+
uint32_t u32ChannelNum,
546+
uint32_t u32Frequency,
547+
uint32_t u32DutyCycle,
548+
uint32_t u32Frequency2);
544549
void EPWM_Start(EPWM_T *epwm, uint32_t u32ChannelMask);
545550
void EPWM_Stop(EPWM_T *epwm, uint32_t u32ChannelMask);
546551
void EPWM_ForceStop(EPWM_T *epwm, uint32_t u32ChannelMask);
Lines changed: 208 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,208 @@
1+
/* mbed Microcontroller Library
2+
* Copyright (c) 2017-2018 Nuvoton
3+
*
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* Licensed under the Apache License, Version 2.0 (the "License");
5+
* you may not use this file except in compliance with the License.
6+
* You may obtain a copy of the License at
7+
*
8+
* http://www.apache.org/licenses/LICENSE-2.0
9+
*
10+
* Unless required by applicable law or agreed to in writing, software
11+
* distributed under the License is distributed on an "AS IS" BASIS,
12+
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13+
* See the License for the specific language governing permissions and
14+
* limitations under the License.
15+
*/
16+
17+
#include "pwmout_api.h"
18+
19+
#if DEVICE_PWMOUT
20+
21+
#include "cmsis.h"
22+
#include "pinmap.h"
23+
#include "PeripheralPins.h"
24+
#include "nu_modutil.h"
25+
#include "nu_miscutil.h"
26+
#include "nu_bitutil.h"
27+
28+
struct nu_pwm_var {
29+
uint32_t en_msk;
30+
};
31+
32+
static struct nu_pwm_var pwm0_var = {
33+
.en_msk = 0
34+
};
35+
36+
static struct nu_pwm_var pwm1_var = {
37+
.en_msk = 0
38+
};
39+
40+
static uint32_t pwm_modinit_mask = 0;
41+
42+
static const struct nu_modinit_s pwm_modinit_tab[] = {
43+
{PWM_0_0, EPWM0_MODULE, CLK_CLKSEL2_EPWM0SEL_PCLK0, 0, EPWM0_RST, EPWM0_P0_IRQn, &pwm0_var},
44+
{PWM_0_1, EPWM0_MODULE, CLK_CLKSEL2_EPWM0SEL_PCLK0, 0, EPWM0_RST, EPWM0_P0_IRQn, &pwm0_var},
45+
{PWM_0_2, EPWM0_MODULE, CLK_CLKSEL2_EPWM0SEL_PCLK0, 0, EPWM0_RST, EPWM0_P1_IRQn, &pwm0_var},
46+
{PWM_0_3, EPWM0_MODULE, CLK_CLKSEL2_EPWM0SEL_PCLK0, 0, EPWM0_RST, EPWM0_P1_IRQn, &pwm0_var},
47+
{PWM_0_4, EPWM0_MODULE, CLK_CLKSEL2_EPWM0SEL_PCLK0, 0, EPWM0_RST, EPWM0_P2_IRQn, &pwm0_var},
48+
{PWM_0_5, EPWM0_MODULE, CLK_CLKSEL2_EPWM0SEL_PCLK0, 0, EPWM0_RST, EPWM0_P2_IRQn, &pwm0_var},
49+
50+
{PWM_1_0, EPWM1_MODULE, CLK_CLKSEL2_EPWM1SEL_PCLK1, 0, EPWM1_RST, EPWM1_P0_IRQn, &pwm1_var},
51+
{PWM_1_1, EPWM1_MODULE, CLK_CLKSEL2_EPWM1SEL_PCLK1, 0, EPWM1_RST, EPWM1_P0_IRQn, &pwm1_var},
52+
{PWM_1_2, EPWM1_MODULE, CLK_CLKSEL2_EPWM1SEL_PCLK1, 0, EPWM1_RST, EPWM1_P1_IRQn, &pwm1_var},
53+
{PWM_1_3, EPWM1_MODULE, CLK_CLKSEL2_EPWM1SEL_PCLK1, 0, EPWM1_RST, EPWM1_P1_IRQn, &pwm1_var},
54+
{PWM_1_4, EPWM1_MODULE, CLK_CLKSEL2_EPWM1SEL_PCLK1, 0, EPWM1_RST, EPWM1_P2_IRQn, &pwm1_var},
55+
{PWM_1_5, EPWM1_MODULE, CLK_CLKSEL2_EPWM1SEL_PCLK1, 0, EPWM1_RST, EPWM1_P2_IRQn, &pwm1_var},
56+
57+
{NC, 0, 0, 0, 0, (IRQn_Type) 0, NULL}
58+
};
59+
60+
static void pwmout_config(pwmout_t* obj, int start);
61+
62+
void pwmout_init(pwmout_t* obj, PinName pin)
63+
{
64+
obj->pwm = (PWMName) pinmap_peripheral(pin, PinMap_PWM);
65+
MBED_ASSERT((int) obj->pwm != NC);
66+
67+
const struct nu_modinit_s *modinit = get_modinit(obj->pwm, pwm_modinit_tab);
68+
MBED_ASSERT(modinit != NULL);
69+
MBED_ASSERT(modinit->modname == (int) obj->pwm);
70+
71+
// NOTE: All channels (identified by PWMName) share a PWM module. This reset will also affect other channels of the same PWM module.
72+
if (! ((struct nu_pwm_var *) modinit->var)->en_msk) {
73+
/* Reset module
74+
*
75+
* NOTE: We must call secure version (from non-secure domain) because SYS/CLK regions are secure.
76+
*/
77+
SYS_ResetModule_S(modinit->rsetidx);
78+
}
79+
80+
uint32_t chn = NU_MODSUBINDEX(obj->pwm);
81+
82+
// NOTE: Channels 0/1/2/3/4/5 share a clock source.
83+
if ((((struct nu_pwm_var *) modinit->var)->en_msk & 0x3F) == 0) {
84+
/* Select IP clock source
85+
*
86+
* NOTE: We must call secure version (from non-secure domain) because SYS/CLK regions are secure.
87+
*/
88+
CLK_SetModuleClock_S(modinit->clkidx, modinit->clksrc, modinit->clkdiv);
89+
90+
/* Enable IP clock
91+
*
92+
* NOTE: We must call secure version (from non-secure domain) because SYS/CLK regions are secure.
93+
*/
94+
CLK_EnableModuleClock_S(modinit->clkidx);
95+
}
96+
97+
// Wire pinout
98+
pinmap_pinout(pin, PinMap_PWM);
99+
100+
// Default: period = 10 ms, pulse width = 0 ms
101+
obj->period_us = 1000 * 10;
102+
obj->pulsewidth_us = 0;
103+
pwmout_config(obj, 0);
104+
105+
((struct nu_pwm_var *) modinit->var)->en_msk |= 1 << chn;
106+
107+
// Mark this module to be inited.
108+
int i = modinit - pwm_modinit_tab;
109+
pwm_modinit_mask |= 1 << i;
110+
}
111+
112+
void pwmout_free(pwmout_t* obj)
113+
{
114+
EPWM_T *pwm_base = (EPWM_T *) NU_MODBASE(obj->pwm);
115+
uint32_t chn = NU_MODSUBINDEX(obj->pwm);
116+
EPWM_ForceStop(pwm_base, 1 << chn);
117+
118+
const struct nu_modinit_s *modinit = get_modinit(obj->pwm, pwm_modinit_tab);
119+
MBED_ASSERT(modinit != NULL);
120+
MBED_ASSERT(modinit->modname == (int) obj->pwm);
121+
((struct nu_pwm_var *) modinit->var)->en_msk &= ~(1 << chn);
122+
123+
124+
if ((((struct nu_pwm_var *) modinit->var)->en_msk & 0x3F) == 0) {
125+
/* Disable IP clock
126+
*
127+
* NOTE: We must call secure version (from non-secure domain) because SYS/CLK regions are secure.
128+
*/
129+
CLK_DisableModuleClock_S(modinit->clkidx);
130+
}
131+
132+
// Mark this module to be deinited.
133+
int i = modinit - pwm_modinit_tab;
134+
pwm_modinit_mask &= ~(1 << i);
135+
}
136+
137+
void pwmout_write(pwmout_t* obj, float value)
138+
{
139+
obj->pulsewidth_us = NU_CLAMP((uint32_t) (value * obj->period_us), 0, obj->period_us);
140+
pwmout_config(obj, 1);
141+
}
142+
143+
float pwmout_read(pwmout_t* obj)
144+
{
145+
return NU_CLAMP((((float) obj->pulsewidth_us) / obj->period_us), 0.0f, 1.0f);
146+
}
147+
148+
void pwmout_period(pwmout_t* obj, float seconds)
149+
{
150+
pwmout_period_us(obj, seconds * 1000000.0f);
151+
}
152+
153+
void pwmout_period_ms(pwmout_t* obj, int ms)
154+
{
155+
pwmout_period_us(obj, ms * 1000);
156+
}
157+
158+
// Set the PWM period, keeping the duty cycle the same.
159+
void pwmout_period_us(pwmout_t* obj, int us)
160+
{
161+
uint32_t period_us_old = obj->period_us;
162+
uint32_t pulsewidth_us_old = obj->pulsewidth_us;
163+
obj->period_us = us;
164+
obj->pulsewidth_us = NU_CLAMP(obj->period_us * pulsewidth_us_old / period_us_old, 0, obj->period_us);
165+
pwmout_config(obj, 1);
166+
}
167+
168+
void pwmout_pulsewidth(pwmout_t* obj, float seconds)
169+
{
170+
pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
171+
}
172+
173+
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms)
174+
{
175+
pwmout_pulsewidth_us(obj, ms * 1000);
176+
}
177+
178+
void pwmout_pulsewidth_us(pwmout_t* obj, int us)
179+
{
180+
obj->pulsewidth_us = NU_CLAMP(us, 0, obj->period_us);
181+
pwmout_config(obj, 1);
182+
}
183+
184+
static void pwmout_config(pwmout_t* obj, int start)
185+
{
186+
EPWM_T *pwm_base = (EPWM_T *) NU_MODBASE(obj->pwm);
187+
uint32_t chn = NU_MODSUBINDEX(obj->pwm);
188+
189+
// To avoid abnormal pulse on (re-)configuration, follow the sequence: stop/configure(/re-start).
190+
// NOTE: The issue is met in ARM mbed CI test tests-api-pwm on M487.
191+
EPWM_ForceStop(pwm_base, 1 << chn);
192+
193+
// NOTE: Support period < 1s
194+
// NOTE: ARM mbed CI test fails due to first PWM pulse error. Workaround by:
195+
// 1. Inverse duty cycle (100 - duty)
196+
// 2. Inverse PWM output polarity
197+
// This trick is here to pass ARM mbed CI test. First PWM pulse error still remains.
198+
EPWM_ConfigOutputChannel2(pwm_base, chn, 1000 * 1000, 100 - obj->pulsewidth_us * 100 / obj->period_us, obj->period_us);
199+
pwm_base->POLCTL |= 1 << (EPWM_POLCTL_PINV0_Pos + chn);
200+
201+
if (start) {
202+
// Enable output of the specified PWM channel
203+
EPWM_EnableOutput(pwm_base, 1 << chn);
204+
EPWM_Start(pwm_base, 1 << chn);
205+
}
206+
}
207+
208+
#endif

targets/targets.json

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4228,7 +4228,7 @@
42284228
"is_disk_virtual": true,
42294229
"supported_toolchains": ["GCC_ARM", "IAR", "ARMC6"],
42304230
"inherits": ["Target"],
4231-
"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "LOWPOWERTIMER", "RTC", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "FLASH"],
4231+
"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "LOWPOWERTIMER", "RTC", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "FLASH"],
42324232
"detect_code": ["1305"],
42334233
"release_versions": ["5"],
42344234
"device_name": "M2351KIAAEES",

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