os_tick for iar

Author: nvlsianpu

hal/targets/hal/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822/analogin_api.c

@@ -60,7 +60,14 @@ uint16_t analogin_read_u16(analogin_t *obj)
 {
     nrf_adc_value_t adc_value;
 
-    nrf_drv_adc_channel_t adc_channel = NRF_DRV_ADC_DEFAULT_CHANNEL(obj->adc_pin);
+    nrf_drv_adc_channel_t adc_channel;
+    
+     
+    adc_channel.config.config.resolution = NRF_ADC_CONFIG_RES_10BIT;
+    adc_channel.config.config.input      = NRF_ADC_CONFIG_SCALING_INPUT_FULL_SCALE;
+    adc_channel.config.config.reference  = NRF_ADC_CONFIG_REF_VBG;
+    adc_channel.config.config.ain        = (obj->adc_pin);
+    adc_channel.p_next = NULL;
 
 
     ret_code_t ret_code;

hal/targets/hal/TARGET_NORDIC/TARGET_NRF5/os_tick.c

@@ -142,6 +142,35 @@ __attribute__((naked)) void COMMON_RTC_IRQ_HANDLER(void)
     );
 }
 
+#elif defined (__ICCARM__)//IAR
+void common_rtc_irq_handler(void);
+
+__stackless __task void COMMON_RTC_IRQ_HANDLER(void)
+{
+    uint32_t temp;
+    
+    __asm volatile(
+    "   ldr  %[temp], [%[reg2check]] \n"
+    "   cmp  %[temp], #0             \n"
+    "   beq  1f                      \n"
+    "   bl.w OS_Tick_Handler            \n"
+    "1:                             \n"
+    "   push {r3, lr}\n"
+    "   blx %[rtc_irq] \n"
+    "   pop {r3, pc}\n"
+    
+    : /* Outputs */
+    [temp] "=&r"(temp)
+    : /* Inputs */
+    [reg2check] "r"(0x40011144),
+    [rtc_irq] "r"(common_rtc_irq_handler)
+    : /* Clobbers */
+    "cc"
+    );
+    (void)temp;
+}
+
+
 #else
 
 #error Compiler not supported.
@@ -345,7 +374,7 @@ uint32_t os_tick_val(void) {
         return clock_cycles_by_tick - ((current_counter - next_tick_cc_value) % clock_cycles_by_tick);
     }
 
-    return 0;
+    //return 0;
 }
 
 #endif // defined(TARGET_MCU_NRF51822)