@@ -59,9 +59,63 @@ extern "C" {
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/**
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* \defgroup hal_GeneralSPI SPI Configuration Functions
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+ *
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+ * # Defined behavior
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+ * * ::spi_init initialize the SPI peripheral
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+ * * ::spi_init configures the pins used by SPI
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+ * * ::spi_init sets a default format and frequency
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+ * * ::spi_init enables the peripheral
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+ * * ::spi_free returns the pins owned by the SPI object to their reset state
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+ * * ::spi_format sets the number of bits per frame
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+ * * ::spi_format configures clock polarity and phase
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+ * * ::spi_format configures master/slave mode
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+ * * ::spi_frequency sets the SPI baud rate
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+ * * ::spi_master_write writes a symbol out in master mode and receives a symbol
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+ * * ::spi_master_block_write writes `tx_length` words to the bus
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+ * * ::spi_master_block_write reads `rx_length` words from the bus
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+ * * ::spi_master_block_write returns the maximum of tx_length and rx_length
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+ * * ::spi_master_block_write specifies the write_fill which is default data transmitted while performing a read
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+ * * ::spi_get_module returns non-zero if a value is available to read from SPI channel, 0 otherwise
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+ * * ::spi_slave_read returns a received value out of the SPI receive buffer in slave mode
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+ * * ::spi_slave_read blocks until a value is available
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+ * * ::spi_slave_write writes a value to the SPI peripheral in slave mode
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+ * * ::spi_slave_write blocks until the SPI peripheral can be written to
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+ * * ::spi_busy returns non-zero if the peripheral is currently transmitting, 0 otherwise
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+ * * ::spi_master_transfer starts the SPI asynchronous transfer
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+ * * ::spi_master_transfer writes `tx_len` words to the bus
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+ * * ::spi_master_transfer reads `rx_len` words from the bus
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+ * * ::spi_master_transfer specifies the bit width of buffer words
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+ * * The callback given to ::spi_master_transfer is invoked when the transfer completes (with a success or an error)
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+ * * ::spi_master_transfer specifies the logical OR of events to be registered
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+ * * The ::spi_master_transfer function may use the `DMAUsage` hint to select the appropriate async algorithm
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+ * * ::spi_irq_handler_asynch reads the received values out of the RX FIFO
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+ * * ::spi_irq_handler_asynch writes values into the TX FIFO
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+ * * ::spi_irq_handler_asynch checks for transfer termination conditions, such as buffer overflows or transfer complete
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+ * * ::spi_irq_handler_asynch returns event flags if a transfer termination condition was met, otherwise 0
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+ * * ::spi_abort_asynch aborts an on-going async transfer
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+ * * ::spi_active returns non-zero if the SPI port is active or zero if it is not
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+ *
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+ * # Undefined behavior
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+ * * Calling ::spi_init multiple times on the same `spi_t` without ::spi_free
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+ * * Calling any function other than ::spi_init on a non-initialized or freed `spi_t`
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+ * * Passing pins that cannot be on the same peripheral
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+ * * Passing an invalid pointer as `obj` to any function
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+ * * Passing an invalid pointer as `handler` to ::spi_master_transfer
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+ * * Calling ::spi_abort while no async transfer is being processed (no transfer or a synchronous transfer)
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+ *
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* @{
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*/
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+ /**
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+ * \defgroup hal_GeneralSPI_tests SPI hal tests
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+ * The SPI HAL tests ensure driver conformance to defined behaviour.
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+ *
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+ * To run the SPI hal tests use the command:
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+ *
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+ * mbed test -t <toolchain> -m <target> -n tests-mbed_hal_fpga_ci_test_shield-spi
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+ *
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+ */
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+
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#ifdef DEVICE_SPI_COUNT
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/**
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* Returns a variant of the SPIName enum uniquely identifying a SPI peripheral of the device.
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