18
18
#ifndef USBHAL_IP_OTGFSHS_H
19
19
#define USBHAL_IP_OTGFSHS_H
20
20
21
- #if defined(TARGET_DISCO_F769NI )
21
+ //==================================================================
22
+ // This board has both USB OTG FS and HS connectors.
23
+ // Select one line only.
24
+ //==================================================================
25
+ #if defined(TARGET_DISCO_F746NG )
26
+ //#define TARGET_DISCO_F746NG_OTG_FS
27
+ #define TARGET_DISCO_F746NG_OTG_HS
28
+ #endif
29
+
30
+ #if defined(TARGET_DISCO_F769NI ) || \
31
+ defined(TARGET_DISCO_F746NG_OTG_HS )
22
32
#define USBHAL_IRQn OTG_HS_IRQn
23
33
#else
24
34
#define USBHAL_IRQn OTG_FS_IRQn
@@ -85,7 +95,8 @@ USBHAL::USBHAL(void) {
85
95
86
96
memset (& hpcd .Init , 0 , sizeof (hpcd .Init ));
87
97
88
- #if defined(TARGET_DISCO_F769NI )
98
+ #if defined(TARGET_DISCO_F769NI ) || \
99
+ defined(TARGET_DISCO_F746NG_OTG_HS )
89
100
hpcd .Instance = USB_OTG_HS ;
90
101
hpcd .Init .phy_itface = PCD_PHY_ULPI ;
91
102
hpcd .Init .Sof_enable = 0 ;
@@ -120,33 +131,45 @@ USBHAL::USBHAL(void) {
120
131
121
132
// Configure USB pins and other clocks
122
133
123
- // NUCLEO_144 boards
124
134
#if defined(TARGET_NUCLEO_F207ZG ) || \
135
+ defined(TARGET_NUCLEO_F401RE ) || \
136
+ defined(TARGET_NUCLEO_F411RE ) || \
125
137
defined(TARGET_NUCLEO_F412ZG ) || \
126
138
defined(TARGET_NUCLEO_F429ZI ) || \
127
139
defined(TARGET_NUCLEO_F446ZE ) || \
128
140
defined(TARGET_NUCLEO_F767ZI ) || \
129
- defined(TARGET_NUCLEO_F746ZG )
141
+ defined(TARGET_NUCLEO_F746ZG ) || \
142
+ defined(TARGET_DISCO_F469NI ) || \
143
+ defined(TARGET_DISCO_F746NG_OTG_FS )
130
144
__HAL_RCC_GPIOA_CLK_ENABLE ();
131
- pin_function (PA_8 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_NOPULL , GPIO_AF10_OTG_FS )); /* OTG_FS_SOF */
132
- pin_function (PA_9 , STM_PIN_DATA (STM_MODE_INPUT , GPIO_NOPULL , GPIO_AF10_OTG_FS )); /* OTG_FS_VBUS */
133
- pin_function (PA_10 , STM_PIN_DATA (STM_MODE_AF_OD , GPIO_PULLUP , GPIO_AF10_OTG_FS )); /* OTG_FS_ID */
134
- pin_function (PA_11 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_NOPULL , GPIO_AF10_OTG_FS )); /* OTG_FS_DM */
135
- pin_function (PA_12 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_NOPULL , GPIO_AF10_OTG_FS )); /* OTG_FS_DP */
145
+ pin_function (PA_11 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_NOPULL , GPIO_AF10_OTG_FS )); // DM
146
+ pin_function (PA_12 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_NOPULL , GPIO_AF10_OTG_FS )); // DP
147
+ pin_function (PA_9 , STM_PIN_DATA (STM_MODE_INPUT , GPIO_NOPULL , GPIO_AF10_OTG_FS )); // VBUS
148
+ pin_function (PA_10 , STM_PIN_DATA (STM_MODE_AF_OD , GPIO_PULLUP , GPIO_AF10_OTG_FS )); // ID
149
+ pin_function (PA_8 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_NOPULL , GPIO_AF10_OTG_FS )); // SOF
150
+ __HAL_RCC_USB_OTG_FS_CLK_ENABLE ();
151
+
152
+ #elif defined(TARGET_DISCO_F429ZI )
153
+ __HAL_RCC_GPIOB_CLK_ENABLE ();
154
+ pin_function (PB_14 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_NOPULL , GPIO_AF12_OTG_HS_FS )); // DM
155
+ pin_function (PB_15 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_NOPULL , GPIO_AF12_OTG_HS_FS )); // DP
156
+ pin_function (PB_13 , STM_PIN_DATA (STM_MODE_INPUT , GPIO_NOPULL , GPIO_AF12_OTG_HS_FS )); // VBUS
157
+ pin_function (PB_12 , STM_PIN_DATA (STM_MODE_AF_OD , GPIO_PULLUP , GPIO_AF12_OTG_HS_FS )); // ID
136
158
__HAL_RCC_USB_OTG_FS_CLK_ENABLE ();
137
159
138
160
#elif defined(TARGET_DISCO_L475VG_IOT01A ) || \
139
161
defined(TARGET_DISCO_L476VG )
140
162
__HAL_RCC_GPIOA_CLK_ENABLE ();
141
- pin_function (PA_11 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_NOPULL , GPIO_AF10_OTG_FS )); /* OTG_FS_DM */
142
- pin_function (PA_12 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_NOPULL , GPIO_AF10_OTG_FS )); /* OTG_FS_DP */
163
+ pin_function (PA_11 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_NOPULL , GPIO_AF10_OTG_FS )); // DM
164
+ pin_function (PA_12 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_NOPULL , GPIO_AF10_OTG_FS )); // DP
143
165
__HAL_RCC_GPIOC_CLK_ENABLE ();
144
- pin_function (PC_11 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_NOPULL , GPIO_AF10_OTG_FS )); /* VBUS pin */
166
+ pin_function (PC_11 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_NOPULL , GPIO_AF10_OTG_FS )); // VBUS
145
167
__HAL_RCC_PWR_CLK_ENABLE ();
146
168
HAL_PWREx_EnableVddUSB ();
147
169
__HAL_RCC_USB_OTG_FS_CLK_ENABLE ();
148
170
149
- #elif defined(TARGET_DISCO_F769NI )
171
+ #elif defined(TARGET_DISCO_F769NI ) || \
172
+ defined(TARGET_DISCO_F746NG_OTG_HS )
150
173
__HAL_RCC_GPIOA_CLK_ENABLE ();
151
174
__HAL_RCC_GPIOB_CLK_ENABLE ();
152
175
__HAL_RCC_GPIOC_CLK_ENABLE ();
@@ -163,9 +186,14 @@ USBHAL::USBHAL(void) {
163
186
pin_function (PB_13 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_NOPULL , GPIO_AF10_OTG_HS )); // D7
164
187
pin_function (PC_0 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_NOPULL , GPIO_AF10_OTG_HS )); // STP
165
188
pin_function (PH_4 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_NOPULL , GPIO_AF10_OTG_HS )); // NXT
189
+ #if defined(TARGET_DISCO_F769NI )
166
190
pin_function (PI_11 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_NOPULL , GPIO_AF10_OTG_HS )); // DIR
191
+ #else // TARGET_DISCO_F746NG
192
+ pin_function (PC_2 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_NOPULL , GPIO_AF10_OTG_HS )); // DIR
193
+ #endif
167
194
__HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE ();
168
195
__HAL_RCC_USB_OTG_HS_CLK_ENABLE ();
196
+
169
197
#else
170
198
#error "USB pins are not configured !"
171
199
#endif
0 commit comments