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Nuvoton: Fix WDT feature report with clock frequency
1 parent b70b65c commit 2162aaa

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4 files changed

+113
-21
lines changed

4 files changed

+113
-21
lines changed

‎targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c

Lines changed: 29 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -21,11 +21,30 @@
2121

2222
#include "cmsis.h"
2323

24-
/* Micro seconds per second */
25-
#define NU_US_PER_SEC 1000000
24+
/* Define WDT clock source in target configuration option */
25+
#ifndef MBED_CONF_TARGET_WDT_CLKSRC_SEL
26+
#define MBED_CONF_TARGET_WDT_CLKSRC_SEL LIRC
27+
#endif
28+
29+
/* WDT clock source definition */
30+
#define NU_INTERN_WDT_CLKSRC_LXT 1
31+
#define NU_INTERN_WDT_CLKSRC_LIRC 2
32+
33+
/* WDT clock source selection */
34+
#define NU_INTERN_WDT_CLKSRC_SEL__(SEL) NU_INTERN_WDT_CLKSRC_##SEL
35+
#define NU_INTERN_WDT_CLKSRC_SEL_(SEL) NU_INTERN_WDT_CLKSRC_SEL__(SEL)
36+
#define NU_INTERN_WDT_CLKSRC_SEL NU_INTERN_WDT_CLKSRC_SEL_(MBED_CONF_TARGET_WDT_CLKSRC_SEL)
2637

2738
/* Watchdog clock per second */
39+
#if NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LXT
40+
#define NU_WDTCLK_PER_SEC (__LXT)
41+
#define NU_WDTCLK_PER_SEC_MAX (__LXT)
42+
#define NU_WDTCLK_PER_SEC_MIN (__LXT)
43+
#elif NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LIRC
2844
#define NU_WDTCLK_PER_SEC (__LIRC)
45+
#define NU_WDTCLK_PER_SEC_MAX ((uint32_t) ((__LIRC) * 1.5f))
46+
#define NU_WDTCLK_PER_SEC_MIN ((uint32_t) ((__LIRC) * 0.5f))
47+
#endif
2948

3049
/* Convert watchdog clock to nearest ms */
3150
#define NU_WDTCLK2MS(WDTCLK) (((WDTCLK) * 1000 + ((NU_WDTCLK_PER_SEC) / 2)) / (NU_WDTCLK_PER_SEC))
@@ -84,7 +103,11 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config)
84103
CLK_EnableModuleClock(WDT_MODULE);
85104

86105
/* Select IP clock source */
106+
#if NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LXT
107+
CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LXT, 0);
108+
#elif NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LIRC
87109
CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LIRC, 0);
110+
#endif
88111

89112
/* Set up IP interrupt */
90113
NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler);
@@ -129,9 +152,10 @@ watchdog_features_t hal_watchdog_get_platform_features(void)
129152
wdt_feat.update_config = 1;
130153
/* Support stopping watchdog timer */
131154
wdt_feat.disable_watchdog = 1;
132-
/* Accuracy of watchdog timer */
133-
wdt_feat.clock_typical_frequency = 10000;
134-
wdt_feat.clock_max_frequency = 15000;
155+
/* Typical frequency of not calibrated watchdog clock in Hz */
156+
wdt_feat.clock_typical_frequency = NU_WDTCLK_PER_SEC;
157+
/* Maximum frequency of not calibrated watchdog clock in Hz */
158+
wdt_feat.clock_max_frequency = NU_WDTCLK_PER_SEC_MAX;
135159

136160
return wdt_feat;
137161
}

‎targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c

Lines changed: 29 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -20,11 +20,30 @@
2020

2121
#include "cmsis.h"
2222

23-
/* Micro seconds per second */
24-
#define NU_US_PER_SEC 1000000
23+
/* Define WDT clock source in target configuration option */
24+
#ifndef MBED_CONF_TARGET_WDT_CLKSRC_SEL
25+
#define MBED_CONF_TARGET_WDT_CLKSRC_SEL LIRC
26+
#endif
27+
28+
/* WDT clock source definition */
29+
#define NU_INTERN_WDT_CLKSRC_LXT 1
30+
#define NU_INTERN_WDT_CLKSRC_LIRC 2
31+
32+
/* WDT clock source selection */
33+
#define NU_INTERN_WDT_CLKSRC_SEL__(SEL) NU_INTERN_WDT_CLKSRC_##SEL
34+
#define NU_INTERN_WDT_CLKSRC_SEL_(SEL) NU_INTERN_WDT_CLKSRC_SEL__(SEL)
35+
#define NU_INTERN_WDT_CLKSRC_SEL NU_INTERN_WDT_CLKSRC_SEL_(MBED_CONF_TARGET_WDT_CLKSRC_SEL)
2536

2637
/* Watchdog clock per second */
38+
#if NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LXT
39+
#define NU_WDTCLK_PER_SEC (__LXT)
40+
#define NU_WDTCLK_PER_SEC_MAX (__LXT)
41+
#define NU_WDTCLK_PER_SEC_MIN (__LXT)
42+
#elif NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LIRC
2743
#define NU_WDTCLK_PER_SEC (__LIRC)
44+
#define NU_WDTCLK_PER_SEC_MAX ((uint32_t) ((__LIRC) * 2.0f))
45+
#define NU_WDTCLK_PER_SEC_MIN ((uint32_t) ((__LIRC) * 0.5f))
46+
#endif
2847

2948
/* Convert watchdog clock to nearest ms */
3049
#define NU_WDTCLK2MS(WDTCLK) (((WDTCLK) * 1000 + ((NU_WDTCLK_PER_SEC) / 2)) / (NU_WDTCLK_PER_SEC))
@@ -83,7 +102,11 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config)
83102
CLK_EnableModuleClock(WDT_MODULE);
84103

85104
/* Select IP clock source */
105+
#if NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LXT
106+
CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LXT, 0);
107+
#elif NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LIRC
86108
CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LIRC, 0);
109+
#endif
87110

88111
/* Set up IP interrupt */
89112
NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler);
@@ -128,10 +151,10 @@ watchdog_features_t hal_watchdog_get_platform_features(void)
128151
wdt_feat.update_config = 1;
129152
/* Support stopping watchdog timer */
130153
wdt_feat.disable_watchdog = 1;
131-
/* Accuracy of watchdog timer */
132-
wdt_feat.clock_typical_frequency = 10000;
133-
wdt_feat.clock_max_frequency = 15000;
134-
154+
/* Typical frequency of not calibrated watchdog clock in Hz */
155+
wdt_feat.clock_typical_frequency = NU_WDTCLK_PER_SEC;
156+
/* Maximum frequency of not calibrated watchdog clock in Hz */
157+
wdt_feat.clock_max_frequency = NU_WDTCLK_PER_SEC_MAX;
135158

136159
return wdt_feat;
137160
}

‎targets/TARGET_NUVOTON/TARGET_NANO100/watchdog_api.c

Lines changed: 26 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -20,11 +20,31 @@
2020

2121
#include "cmsis.h"
2222

23-
/* Micro seconds per second */
24-
#define NU_US_PER_SEC 1000000
23+
/* Define WDT clock source in target configuration option */
24+
#ifndef MBED_CONF_TARGET_WDT_CLKSRC_SEL
25+
#define MBED_CONF_TARGET_WDT_CLKSRC_SEL LIRC
26+
#endif
27+
28+
/* WDT clock source definition */
29+
#define NU_INTERN_WDT_CLKSRC_LXT 1
30+
/* Not support LIRC clocked WDT */
31+
//#define NU_INTERN_WDT_CLKSRC_LIRC 2
32+
33+
/* WDT clock source selection */
34+
#define NU_INTERN_WDT_CLKSRC_SEL__(SEL) NU_INTERN_WDT_CLKSRC_##SEL
35+
#define NU_INTERN_WDT_CLKSRC_SEL_(SEL) NU_INTERN_WDT_CLKSRC_SEL__(SEL)
36+
#define NU_INTERN_WDT_CLKSRC_SEL NU_INTERN_WDT_CLKSRC_SEL_(MBED_CONF_TARGET_WDT_CLKSRC_SEL)
2537

2638
/* Watchdog clock per second */
39+
#if NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LXT
40+
#define NU_WDTCLK_PER_SEC (__LXT)
41+
#define NU_WDTCLK_PER_SEC_MAX (__LXT)
42+
#define NU_WDTCLK_PER_SEC_MIN (__LXT)
43+
#elif NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LIRC
2744
#define NU_WDTCLK_PER_SEC (__LIRC)
45+
#define NU_WDTCLK_PER_SEC_MAX ((uint32_t) ((__LIRC) * 1.5f))
46+
#define NU_WDTCLK_PER_SEC_MIN ((uint32_t) ((__LIRC) * 0.5f))
47+
#endif
2848

2949
/* Convert watchdog clock to nearest ms */
3050
#define NU_WDTCLK2MS(WDTCLK) (((WDTCLK) * 1000 + ((NU_WDTCLK_PER_SEC) / 2)) / (NU_WDTCLK_PER_SEC))
@@ -134,9 +154,10 @@ watchdog_features_t hal_watchdog_get_platform_features(void)
134154
wdt_feat.update_config = 1;
135155
/* Support stopping watchdog timer */
136156
wdt_feat.disable_watchdog = 1;
137-
/* Accuracy of watchdog timer */
138-
wdt_feat.clock_typical_frequency = 10000;
139-
wdt_feat.clock_max_frequency = 15000;
157+
/* Typical frequency of not calibrated watchdog clock in Hz */
158+
wdt_feat.clock_typical_frequency = NU_WDTCLK_PER_SEC;
159+
/* Maximum frequency of not calibrated watchdog clock in Hz */
160+
wdt_feat.clock_max_frequency = NU_WDTCLK_PER_SEC_MAX;
140161

141162
return wdt_feat;
142163
}

‎targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c

Lines changed: 29 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -20,11 +20,30 @@
2020

2121
#include "cmsis.h"
2222

23-
/* Micro seconds per second */
24-
#define NU_US_PER_SEC 1000000
23+
/* Define WDT clock source in target configuration option */
24+
#ifndef MBED_CONF_TARGET_WDT_CLKSRC_SEL
25+
#define MBED_CONF_TARGET_WDT_CLKSRC_SEL LIRC
26+
#endif
27+
28+
/* WDT clock source definition */
29+
#define NU_INTERN_WDT_CLKSRC_LXT 1
30+
#define NU_INTERN_WDT_CLKSRC_LIRC 2
31+
32+
/* WDT clock source selection */
33+
#define NU_INTERN_WDT_CLKSRC_SEL__(SEL) NU_INTERN_WDT_CLKSRC_##SEL
34+
#define NU_INTERN_WDT_CLKSRC_SEL_(SEL) NU_INTERN_WDT_CLKSRC_SEL__(SEL)
35+
#define NU_INTERN_WDT_CLKSRC_SEL NU_INTERN_WDT_CLKSRC_SEL_(MBED_CONF_TARGET_WDT_CLKSRC_SEL)
2536

2637
/* Watchdog clock per second */
38+
#if NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LXT
39+
#define NU_WDTCLK_PER_SEC (__LXT)
40+
#define NU_WDTCLK_PER_SEC_MAX (__LXT)
41+
#define NU_WDTCLK_PER_SEC_MIN (__LXT)
42+
#elif NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LIRC
2743
#define NU_WDTCLK_PER_SEC (__LIRC)
44+
#define NU_WDTCLK_PER_SEC_MAX ((uint32_t) ((__LIRC) * 1.4f))
45+
#define NU_WDTCLK_PER_SEC_MIN ((uint32_t) ((__LIRC) * 0.6f))
46+
#endif
2847

2948
/* Convert watchdog clock to nearest ms */
3049
#define NU_WDTCLK2MS(WDTCLK) (((WDTCLK) * 1000 + ((NU_WDTCLK_PER_SEC) / 2)) / (NU_WDTCLK_PER_SEC))
@@ -83,7 +102,11 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config)
83102
CLK_EnableModuleClock(WDT_MODULE);
84103

85104
/* Select IP clock source */
105+
#if NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LXT
106+
CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LXT, 0);
107+
#elif NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LIRC
86108
CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LIRC, 0);
109+
#endif
87110

88111
/* Set up IP interrupt */
89112
NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler);
@@ -128,9 +151,10 @@ watchdog_features_t hal_watchdog_get_platform_features(void)
128151
wdt_feat.update_config = 1;
129152
/* Support stopping watchdog timer */
130153
wdt_feat.disable_watchdog = 1;
131-
/* Accuracy of watchdog timer */
132-
wdt_feat.clock_typical_frequency = 10000;
133-
wdt_feat.clock_max_frequency = 14000;
154+
/* Typical frequency of not calibrated watchdog clock in Hz */
155+
wdt_feat.clock_typical_frequency = NU_WDTCLK_PER_SEC;
156+
/* Maximum frequency of not calibrated watchdog clock in Hz */
157+
wdt_feat.clock_max_frequency = NU_WDTCLK_PER_SEC_MAX;
134158

135159
return wdt_feat;
136160
}

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