Merge pull request #13951 from LDong-Arm/NRF52_DK-baremetal

0xc0170 · web-flow · commit 22c1c6c7cfc6 · 2020-11-26T15:54:46.000Z
MCU_NRF52832 (NRF52_DK, SDT52832B): use two-region memory model to support MicroLib
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct
@@ -26,22 +26,23 @@
 
 #define MBED_RAM0_START MBED_RAM_START
 #define MBED_RAM0_SIZE  0xE0
-#define MBED_RAM1_START (MBED_RAM_START + MBED_RAM0_SIZE)
+#define MBED_RAM1_START (MBED_RAM0_START + MBED_RAM0_SIZE)
 #define MBED_RAM1_SIZE  (MBED_RAM_SIZE - MBED_RAM0_SIZE)
 
 LR_IROM1 MBED_APP_START MBED_APP_SIZE {
   ER_IROM1 MBED_APP_START MBED_APP_SIZE {
    *.o (RESET, +First)
-   *(InRoot$$Sections) 
+   *(InRoot$$Sections)
    .ANY (+RO)
   }
-
   RW_IRAM0 MBED_RAM0_START UNINIT MBED_RAM0_SIZE { ;no init section
         *(*nvictable)
   }
   RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE {
    .ANY (+RW +ZI)
   }
-  ARM_LIB_STACK MBED_RAM1_START+MBED_RAM1_SIZE EMPTY -Stack_Size { ; Stack region growing down
+  ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM1_START + MBED_RAM1_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
+  }
+  ARM_LIB_STACK MBED_RAM1_START + MBED_RAM1_SIZE EMPTY - Stack_Size { ; Stack region growing down
   }
 }

Original file line number	Diff line number	Diff line change
`@@ -26,22 +26,23 @@`
`26`	`26`
`27`	`27`	`#define MBED_RAM0_START MBED_RAM_START`
`28`	`28`	`#define MBED_RAM0_SIZE 0xE0`
`29`		`-#define MBED_RAM1_START (MBED_RAM_START + MBED_RAM0_SIZE)`
	`29`	`+#define MBED_RAM1_START (MBED_RAM0_START + MBED_RAM0_SIZE)`
`30`	`30`	`#define MBED_RAM1_SIZE (MBED_RAM_SIZE - MBED_RAM0_SIZE)`
`31`	`31`
`32`	`32`	`LR_IROM1 MBED_APP_START MBED_APP_SIZE {`
`33`	`33`	`ER_IROM1 MBED_APP_START MBED_APP_SIZE {`
`34`	`34`	`*.o (RESET, +First)`
`35`		`- *(InRoot$$Sections)`
	`35`	`+ *(InRoot$$Sections)`
`36`	`36`	`.ANY (+RO)`
`37`	`37`	`}`
`38`		`-`
`39`	`38`	`RW_IRAM0 MBED_RAM0_START UNINIT MBED_RAM0_SIZE { ;no init section`
`40`	`39`	`(nvictable)`
`41`	`40`	`}`
`42`	`41`	`RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE {`
`43`	`42`	`.ANY (+RW +ZI)`
`44`	`43`	`}`
`45`		`- ARM_LIB_STACK MBED_RAM1_START+MBED_RAM1_SIZE EMPTY -Stack_Size { ; Stack region growing down`
	`44`	`+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM1_START + MBED_RAM1_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) {`
	`45`	`+ }`
	`46`	`+ ARM_LIB_STACK MBED_RAM1_START + MBED_RAM1_SIZE EMPTY - Stack_Size { ; Stack region growing down`
`46`	`47`	`}`
`47`	`48`	`}`