Skip to content

Commit 2b8f993

Browse files
theotherjimmyadbridge
authored andcommitted
Test memap parsing for ARMC6 and IAR
1 parent 238596f commit 2b8f993

File tree

3 files changed

+169
-0
lines changed

3 files changed

+169
-0
lines changed

tools/test/memap/arm.map

Lines changed: 47 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,47 @@
1+
Component: ARM Compiler 5.06 update 5 (build 528) Tool: armlink [4d35e2]
2+
3+
==============================================================================
4+
5+
Memory Map of the image
6+
7+
Image Entry point : 0x0001b0c1
8+
9+
Load Region LR_IROM1 (Base: 0x0001b000, Size: 0x0000ed04, Max: 0x00025000, ABSOLUTE, COMPRESSED[0x0000e23c])
10+
11+
Execution Region ER_IROM1 (Base: 0x0001b000, Size: 0x0000e1c4, Max: 0x00025000, ABSOLUTE)
12+
13+
Base Addr Size Type Attr Idx E Section Name Object
14+
15+
0x0001b000 0x000000c0 Data RO 7002 RESET /common/path/startup/startup.o
16+
0x0001b0c0 0x00000008 Code RO 8820 * !!!main /installed/libs/../lib/armlib/c_p.l(__main.o)
17+
0x0001b26c 0x00000098 Code RO 6076 .text /common/path/irqs/irqs.o
18+
0x000206a0 0x00000036 Code RO 27 i._Z9time_funcPN4mbed5TimerEi /common/path/main.o
19+
0x200039b4 0x00000018 Data RW 8092 .data /common/path/data/data.o
20+
0x20003af8 0x00000198 Zero RW 57 .bss /common/path/data/data.o
21+
22+
==============================================================================
23+
24+
Image component sizes
25+
26+
27+
Code (inc. data) RO Data RW Data ZI Data Debug
28+
29+
344 368 0 24 408 36188 Object Totals
30+
8 0 0 0 0 7596 Library Totals
31+
32+
==============================================================================
33+
34+
35+
Code (inc. data) RO Data RW Data ZI Data Debug
36+
37+
352 376 0 24 408 17208 Grand Totals
38+
352 376 0 24 408 17208 ELF Image Totals (compressed)
39+
352 376 0 24 0 0 ROM Totals
40+
41+
==============================================================================
42+
43+
Total RO Size (Code + RO Data) 352 ( 0.35kB)
44+
Total RW Size (RW Data + ZI Data) 432 ( 0.43kB)
45+
Total ROM Size (Code + RO Data + RW Data) 376 ( 0.37kB)
46+
47+
==============================================================================

tools/test/memap/iar.map

Lines changed: 86 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,86 @@
1+
###############################################################################
2+
#
3+
# IAR ELF Linker V7.80.1.28/LNX for ARM 18/Sep/2017 14:26:09
4+
# Copyright 2007-2016 IAR Systems AB.
5+
#
6+
# Output file =
7+
# /common/path/project.elf
8+
# Map file =
9+
# /common/path/project.map
10+
# Command line =
11+
# -f
12+
# /common/path/.link_files.txt
13+
# (-o
14+
# --map=/common/path/project.map
15+
# /common/path/project.elf
16+
# /common/path/main.o
17+
# /common/path/startup/startup.o
18+
# /common/path/irqs/irqs.o
19+
# /common/path/data/data.o
20+
#
21+
###############################################################################
22+
23+
*******************************************************************************
24+
*** RUNTIME MODEL ATTRIBUTES
25+
***
26+
27+
CppFlavor = *
28+
__CPP_Exceptions = Disabled
29+
__CPP_Language = C++
30+
__Heap_Handler = DLMalloc
31+
__SystemLibrary = DLib
32+
__dlib_dynamic_initialization = postponed
33+
__dlib_has_iterator_debugging = 0
34+
__dlib_jmp_buf_num_elements = 8
35+
36+
37+
*******************************************************************************
38+
*** PLACEMENT SUMMARY
39+
***
40+
41+
"A0": place at 0x0001b000 { ro section .intvec };
42+
"P1": place in [from 0x0001b0c0 to 0x0003ffff] { ro };
43+
"P2": place in [from 0x20002ef8 to 0x20007fff] { rw, block HEAP, block CSTACK };
44+
do not initialize { section .noinit };
45+
initialize by copy { rw };
46+
{ section .intvec };
47+
48+
Section Kind Address Size Object
49+
------- ---- ------- ---- ------
50+
"A0": 0xc0
51+
.intvec ro code 0x0001b000 0xc0 startup.o [4]
52+
- 0x0001b0c0 0xc0
53+
54+
"P1": 0x
55+
.text ro code 0x0001c753 0x36 main.o [3]
56+
.text ro code 0x0001cfff 0x98 irqs.o [5]
57+
.text ro code 0x0001c778 0x8 __main.o [67]
58+
59+
"P2", part 1 of 2: 0x18
60+
P2-1 0x20002ef8 0x18 <Init block>
61+
.data inited 0x20002fa8 0x18 data.o [6]
62+
63+
"P2", part 2 of 2: 0x198
64+
P2-2 0x20005388 0x198 <Init block>
65+
.bss zero 0x20002fa8 0x198 data.o [6]
66+
67+
*******************************************************************************
68+
*** INIT TABLE
69+
***
70+
71+
*******************************************************************************
72+
*** MODULE SUMMARY
73+
***
74+
75+
d16M_tlf.a: [67]
76+
__main.o 8
77+
------------------------------------------------
78+
Total: 8
79+
80+
Linker created
81+
---------------------------------------------------
82+
Grand Total:
83+
84+
*******************************************************************************
85+
*** ENTRY LIST
86+
***

tools/test/memap/parse_test.py

Lines changed: 36 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,36 @@
1+
import sys
2+
from io import open
3+
from os.path import isfile, join, dirname
4+
import json
5+
6+
import pytest
7+
8+
from tools.memap import MemapParser
9+
from copy import deepcopy
10+
11+
12+
PARSED_ARM_DATA = {
13+
"startup/startup.o": {".text": 0xc0},
14+
"[lib]/c_p.l/__main.o": {".text": 8},
15+
"irqs/irqs.o": {".text": 0x98},
16+
"data/data.o": {".data": 0x18, ".bss": 0x198},
17+
"main.o": {".text": 0x36},
18+
}
19+
20+
def test_parse_armcc():
21+
memap = MemapParser()
22+
memap.parse_map_file_armcc(open(join(dirname(__file__), "arm.map")))
23+
assert memap.modules == PARSED_ARM_DATA
24+
25+
PARSED_IAR_GCC_DATA = {
26+
"startup/startup.o": {".text": 0xc0},
27+
"[lib]/d16M_tlf.a/__main.o": {".text": 8},
28+
"irqs/irqs.o": {".text": 0x98},
29+
"data/data.o": {".data": 0x18, ".bss": 0x198},
30+
"main.o": {".text": 0x36},
31+
}
32+
33+
def test_parse_iar():
34+
memap = MemapParser()
35+
memap.parse_map_file_iar(open(join(dirname(__file__), "iar.map")))
36+
assert memap.modules == PARSED_IAR_GCC_DATA

0 commit comments

Comments
 (0)