STM32WB: improve FLASH size

Default BLE FW in ST boards is stm32wb5x_BLE_Stack_full_fw.bin
 and gives 808K available FLASH to application

stm32wb5x_BLE_HCILayer_fw.bin
 gives 896K available FLASH to application

Author: jeromecoutant

targets/TARGET_STM/TARGET_STM32WB/README.md

@@ -1,12 +1,13 @@
 * [STM32WB family](#stm32wb-family)
 * [Supported boards](#supported-boards)
-   * [NUCLEO_WB55RG](#nucleo_wb55rg)
+   * [NUCLEO_WB55RG (NUCLEO-WB55RG)](#nucleo_wb55rg-nucleo-wb55rg)
    * [DISCO_WB5MMG (STM32WB5MM-DK)](#disco_wb5mmg-stm32wb5mm-dk)
 * [BLE](#ble)
    * [MBED-OS support](#mbed-os-support)
-   * [mbed-trace support](#mbed-trace-support)
+   * [BLE FW](#ble-fw)
    * [BLE FW update](#ble-fw-update)
    * [BLE FW flashing procedure](#ble-fw-flashing-procedure)
+   * [mbed-trace support](#mbed-trace-support)
 
 
 # STM32WB family
@@ -30,8 +31,9 @@ This ST MCU family is dual-core : based on an Arm Cortex-M4 core and an Arm Cort
 
 [mbed.com platform page](https://os.mbed.com/platforms/ST-Nucleo-WB55RG/)
 
-- Total FLASH is 1MB, but note that it is shared by M4 and M0 cores.
-    - mbed-os application size is then limited to 768 KB
+- Total FLASH is 1MB
+
+But FLASH is shared by M4 and M0 cores, [see BLE FW](#ble-fw)
 
 - RAM: 256 KB
     - SRAM1: 192 KB
@@ -51,8 +53,9 @@ SRAM2 is dedicated for M0 core and inter CPU communication, and then can not be
 
 [mbed.com platform page](https://os.mbed.com/platforms/DISCO-WB5MMG/)
 
-- Total FLASH is 1MB, but note that it is shared by M4 and M0 cores.
-    - mbed-os application size is then limited to 768 KB
+- Total FLASH is 1MB
+
+But FLASH is shared by M4 and M0 cores, [see BLE FW](#ble-fw)
 
 - RAM: 256 KB
     - SRAM1: 192 KB
@@ -83,120 +86,67 @@ Note that the BLE controller firmware running on the cortex-M0 is the same as in
 Official ST Application Note : 
 [AN5289: Building wireless applications with STM32WB Series microcontrollers](https://www.st.com/resource/en/application_note/dm00598033-building-wireless-applications-with-stm32wb-series-microcontrollers-stmicroelectronics.pdf)
 
+## BLE FW
 
+All available BLE FW for M0 core are provided in ths ST STM32CubeWB repo:
 
-## mbed-trace support
+https://github.com/STMicroelectronics/STM32CubeWB/tree/master/Projects/STM32WB_Copro_Wireless_Binaries/STM32WB5x
 
-trace group: BLE_WB
+Default BLE FW in ST boards is **stm32wb5x_BLE_Stack_full_fw.bin**
+- As explained in Release_Notes.html, this FW is flashed at @ 0x080CA000
+- Default "mbed_rom_size" in targets.json is then "0xCA000" (808K)
+
+To optimize FLASH size, **stm32wb5x_BLE_HCILayer_fw.bin** is supported for MBED-OS use case
+- As explained in Release_Notes.html, this FW is flashed at @ 0x080E0000
+- Then "mbed_rom_size" can be updated to "0xE0000" (896K)
+
+Example in your local mbed_app.json:
+```
+    "target_overrides": {
+        "NUCLEO_WB55RG": {
+            "target.mbed_rom_size": "0xE0000"
+        }
+```
 
-example:
-````
-[INFO][BLWB]: WIRELESS COPROCESSOR FW VERSION ID = 1.11.1
-[INFO][BLWB]: WIRELESS COPROCESSOR FW STACK TYPE = 1
-[DBG ][BLWB]: mbox_write type:1, len:3
-[INFO][BLWB]: TX>> BLE CMD
-[DBG ][BLWB]:   Type 0x1
-[DBG ][BLWB]:    Cmd 0xc03
-[DBG ][BLWB]:    Len 0D]
-````
 
 ## BLE FW update
 
 Official ST Application Note : 
 [AN5185: ST firmware upgrade services for STM32WB Series](http://www.st.com/st-web-ui/static/active/en/resource/technical/document/application_note/DM00513965.pdf)
 
-Latest BLE FW :
-https://github.com/STMicroelectronics/STM32CubeWB/blob/master/Projects/STM32WB_Copro_Wireless_Binaries/STM32WB5x/stm32wb5x_BLE_Stack_full_fw.bin
 
 ## BLE FW flashing procedure
 
-Release Note and complete flashing procedure:
-https://htmlpreview.github.io/?https://github.com/STMicroelectronics/STM32CubeWB/blob/master/Projects/STM32WB_Copro_Wireless_Binaries/STM32WB5x/Release_Notes.html
-
-
-- STEP 1: Use STM32CubeProgrammer
+STM32CubeProgrammer needs to be used:
 
 https://www.st.com/en/development-tools/stm32cubeprog.html
 
-````
-FLASHPATH="C:\Program Files\STMicroelectronics\STM32Cube\STM32CubeProgrammer\bin"
-export PATH=$FLASHPATH:$PATH
-````
-
-- STEP 2: Access to Bootloader USB Interface (system flash)
-
-    * Boot0 pin set to VDD : Jumper between CN7.5(VDD) and CN7.7(Boot0)
-    * Jumper JP1 on USB_MCU
-    * Power ON via USB_USER
-
-![Image description](stm32wb_ble_update.jpg)
-
-- STEP 3 : Delete current wireless stack :
-
-```
-$ STM32_Programmer_CLI.exe -c port=usb1 -fwdelete
-...
-FUS state is FUS_IDLE
-
-FUS status is FUS_NO_ERROR
-Deleting firmware ...
-Firmware delete finished
-fwdelete command execution finished
-```
-
-- STEP 4 : Read FUS Version
-
-```
-$ STM32_Programmer_CLI.exe -c port=usb1 -r32 0x20030030 1
-...
-
-Reading 32-bit memory content
-  Size          : 4 Bytes
-  Address:      : 0x20030030
-
-0x20030030 : 00050300
-```
-
-- STEP 5A if last result is 00050300 : Download new FUS :
-
-```
-$ ./STM32_Programmer_CLI.exe -c port=usb1 -fwupgrade stm32wb5x_FUS_fw_for_fus_0_5_3.bin 0x080EC000 firstinstall=0
-```
-
-- STEP 5B if last result is 01000100 or 01000200 : Download new FUS :
-
-```
-$ STM32_Programmer_CLI.exe -c port=usb1 -fwupgrade stm32wb5x_FUS_fw.bin 0x080EC000 firstinstall=0
-...
-Firmware Upgrade Success
-```
-
-
-- STEP 4 (to check) : Read FUS Version
-
-```
-$ STM32_Programmer_CLI.exe -c port=usb1 -r32 0x20030030 1
-
-Reading 32-bit memory content
-  Size          : 4 Bytes
-  Address:      : 0x20030030
-
-0x20030030 : 01020000
-```
+Please check the Release Note and complete flashing procedure:
+https://htmlpreview.github.io/?https://github.com/STMicroelectronics/STM32CubeWB/blob/master/Projects/STM32WB_Copro_Wireless_Binaries/STM32WB5x/Release_Notes.html
 
-- STEP 6 : Download new wireless stack :
+- connect the board with ST-LINK
+- In the left column, go to "Firmware Upgrade Services"
+- "Start FUS"
+- "Read FUS infos" => version v1.2.0 is expected
+- Firmware Upgrade / "Browse" : select the chosen FW (see above)
+- Firmware Upgrade / Start address : depends on the chosen FW (see above)
+- Firmware Upgrade / "Firmware Upgrade"
+- In the left column, go to "Option bytes"
+- User Configuration => "Read"
+- User Configuration / enable nSWBOOT0 => "Apply"
 
 
-```
-$ STM32_Programmer_CLI.exe -c port=usb1 -fwupgrade stm32wb5x_BLE_Stack_full_fw.bin 0x080CA000 firstinstall=1
-
-...
-Download firmware image at address 0x80cb000 ...
-...
-File download complete
-...
-Firmware Upgrade Success
-```
+## mbed-trace support
 
-- STEP 7 : Revert STEP 2 procedure to put back device in normal mode.
+trace group: BLWB
 
+example:
+````
+[INFO][BLWB]: WIRELESS COPROCESSOR FW VERSION ID = 1.11.1
+[INFO][BLWB]: WIRELESS COPROCESSOR FW STACK TYPE = 1
+[DBG ][BLWB]: mbox_write type:1, len:3
+[INFO][BLWB]: TX>> BLE CMD
+[DBG ][BLWB]:   Type 0x1
+[DBG ][BLWB]:    Cmd 0xc03
+[DBG ][BLWB]:    Len 0D]
+````

targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xG/TOOLCHAIN_ARM/stm32wb55xg.sct

@@ -22,8 +22,9 @@
 #endif
 
 #if !defined(MBED_APP_SIZE)
-; 768KB FLASH // BLE firmware is being flashed strating from @ 0x080C0000
-#define MBED_APP_SIZE 0xC0000
+// MBED_APP_SIZE cannot be full ROM size as core M0 FW is using the end of FLASH
+// Size is defined in json with "mbed_rom_size"
+#define MBED_APP_SIZE MBED_ROM_SIZE
 #endif
 
 #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
@@ -38,7 +39,7 @@
 /* Round up VECTORS_SIZE to 8 bytes */
 #define VECTORS_SIZE  (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
 
-; RAM_SIZE = 192KB SRAM (0x30000) + Shared mem
+; RAM_SIZE = 192KB SRAM1 (0x30000) + Shared mem (part of SRAM2)
 LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {
 
   ER_IROM1  MBED_APP_START  MBED_APP_SIZE  {

targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xG/TOOLCHAIN_GCC_ARM/stm32wb55xg.ld

@@ -23,8 +23,9 @@
 #endif
 
 #if !defined(MBED_APP_SIZE)
-/* 768KB FLASH - BLE firmware is being flashed strating from @ 0x080C0000 */
-#define MBED_APP_SIZE 768K
+// MBED_APP_SIZE cannot be full ROM size as core M0 FW is using the end of FLASH
+// Size is defined in json with "mbed_rom_size"
+#define MBED_APP_SIZE MBED_ROM_SIZE
 #endif
 
 #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
@@ -36,7 +37,7 @@
 /* Round up VECTORS_SIZE to 8 bytes */
 #define VECTORS_SIZE  (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
 
-/* RAM_SIZE = 192KB SRAM (0x30000) + Shared mem */
+/* RAM_SIZE = 192KB SRAM1 (0x30000) + Shared mem (part of SRAM2) */
 MEMORY
 { 
   FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE

targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xG/TOOLCHAIN_IAR/stm32wb55xg.icf

@@ -17,7 +17,7 @@
 /* Device specific values */
 
 if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
-if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0xC0000; }
+if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_START; }
 
 /* [ROM = 768kb = 0xC0000] */
 define symbol __intvec_start__     = MBED_APP_START;

targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xG/cmsis_nvic.h

@@ -22,7 +22,9 @@
 #endif
 
 #if !defined(MBED_ROM_SIZE)
-#define MBED_ROM_SIZE  0x100000  // 1.0 MB
+// MBED_ROM_SIZE cannot be full ROM size as core M0 FW is using the end of FLASH
+// Size is defined in json with "mbed_rom_size"
+#error "mbed_rom_size is missing"
 #endif
 
 #if !defined(MBED_RAM_START)

targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB5MxG/TOOLCHAIN_ARM/stm32wb5mxg.sct

@@ -22,8 +22,9 @@
 #endif
 
 #if !defined(MBED_APP_SIZE)
-; 768KB FLASH // BLE firmware is being flashed strating from @ 0x080C0000
-#define MBED_APP_SIZE 0xC0000
+// MBED_APP_SIZE cannot be full ROM size as core M0 FW is using the end of FLASH
+// Size is defined in json with "mbed_rom_size"
+#define MBED_APP_SIZE MBED_ROM_SIZE
 #endif
 
 #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
@@ -38,6 +39,7 @@
 /* Round up VECTORS_SIZE to 8 bytes */
 #define VECTORS_SIZE  (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
 
+; RAM_SIZE = 192KB SRAM1 (0x30000) + Shared mem (part of SRAM2)
 LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {
 
   ER_IROM1  MBED_APP_START  MBED_APP_SIZE  {

targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB5MxG/TOOLCHAIN_GCC_ARM/stm32wb5mxg.ld

@@ -23,8 +23,9 @@
 #endif
 
 #if !defined(MBED_APP_SIZE)
-/* 768KB FLASH - BLE firmware is being flashed strating from @ 0x080C0000 */
-#define MBED_APP_SIZE 768K
+// MBED_APP_SIZE cannot be full ROM size as core M0 FW is using the end of FLASH
+// Size is defined in json with "mbed_rom_size"
+#define MBED_APP_SIZE MBED_ROM_SIZE
 #endif
 
 #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
@@ -36,7 +37,7 @@
 /* Round up VECTORS_SIZE to 8 bytes */
 #define VECTORS_SIZE  (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
 
-/* RAM_SIZE = 192KB SRAM (0x30000) + Shared mem */
+/* RAM_SIZE = 192KB SRAM1 (0x30000) + Shared mem (part of SRAM2) */
 MEMORY
 { 
   FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE

targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB5MxG/TOOLCHAIN_IAR/stm32wb5mxg.icf

@@ -17,7 +17,7 @@
 /* Device specific values */
 
 if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
-if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0xC0000; }
+if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_START; }
 
 /* [ROM = 768kb = 0xC0000] */
 define symbol __intvec_start__     = MBED_APP_START;

targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB5MxG/cmsis_nvic.h

@@ -22,7 +22,9 @@
 #endif
 
 #if !defined(MBED_ROM_SIZE)
-#define MBED_ROM_SIZE  0x100000  // 1.0 MB
+// MBED_ROM_SIZE cannot be full ROM size as core M0 FW is using the end of FLASH
+// Size is defined in json with "mbed_rom_size"
+#error "mbed_rom_size is missing"
 #endif
 
 #if !defined(MBED_RAM_START)

targets/TARGET_STM/TARGET_STM32WB/flash_api.c

@@ -19,7 +19,6 @@
 #if DEVICE_FLASH
 
 #include "flash_api.h"
-#include "flash_data.h"
 #include "mbed_critical.h"
 #include "mbed_assert.h"
 #include "cmsis.h"
@@ -80,7 +79,7 @@ int32_t flash_erase_sector(flash_t *obj, uint32_t address)
     uint32_t cpu1_sem_status = 1;
     uint32_t cpu2_sem_status = 1;
 
-    if ((address >= (FLASH_BASE + FLASH_SIZE)) || (address < FLASH_BASE)) {
+    if ((address >= (FLASH_BASE + MBED_ROM_SIZE)) || (address < FLASH_BASE)) {
         return -1;
     }
 
@@ -179,7 +178,7 @@ int32_t flash_program_page(flash_t *obj, uint32_t address, const uint8_t *data,
     uint32_t cpu1_sem_status = 1;
     uint32_t cpu2_sem_status = 1;
 
-    if ((address >= (FLASH_BASE + FLASH_SIZE)) || (address < FLASH_BASE)) {
+    if ((address >= (FLASH_BASE + MBED_ROM_SIZE)) || (address < FLASH_BASE)) {
         return -1;
     }
 
@@ -267,7 +266,7 @@ int32_t flash_program_page(flash_t *obj, uint32_t address, const uint8_t *data,
 uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address)
 {
     /*  considering 1 sector = 1 page */
-    if ((address >= (FLASH_BASE + FLASH_SIZE)) || (address < FLASH_BASE)) {
+    if ((address >= (FLASH_BASE + MBED_ROM_SIZE)) || (address < FLASH_BASE)) {
         return MBED_FLASH_INVALID_SIZE;
     } else {
         return FLASH_PAGE_SIZE;
@@ -301,7 +300,7 @@ uint32_t flash_get_start_address(const flash_t *obj)
  */
 uint32_t flash_get_size(const flash_t *obj)
 {
-    return FLASH_SIZE;
+    return MBED_ROM_SIZE;
 }
 
 uint8_t flash_get_erase_value(const flash_t *obj)