Merge branch 'deepikabhavnani-doc_updates' into rollup-aus_writathon

Author: Cruz Monrreal II

drivers/QSPI.h

@@ -84,19 +84,22 @@ class QSPI : private NonCopyable<QSPI> {
      *  @param io3 4th IO pin used for sending/receiving data during data phase of a transaction
      *  @param sclk QSPI Clock pin
      *  @param ssel QSPI chip select pin
-     *  @param mode Mode specifies the SPI mode(Mode=0 uses CPOL=0, CPHA=0, Mode=1 uses CPOL=1, CPHA=1)
-     *         default value = 0
+     *  @param mode Clock polarity and phase mode (0 - 3) of SPI
+     *         (Default: Mode=0 uses CPOL=0, CPHA=0, Mode=1 uses CPOL=1, CPHA=1)
      *
      */
     QSPI(PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel = NC, int mode = 0);
+    virtual ~QSPI()
+    {
+    }
 
     /** Configure the data transmission format
      *
      *  @param inst_width Bus width used by instruction phase(Valid values are QSPI_CFG_BUS_SINGLE, QSPI_CFG_BUS_DUAL, QSPI_CFG_BUS_QUAD)
      *  @param address_width Bus width used by address phase(Valid values are QSPI_CFG_BUS_SINGLE, QSPI_CFG_BUS_DUAL, QSPI_CFG_BUS_QUAD)
      *  @param address_size Size in bits used by address phase(Valid values are QSPI_CFG_ADDR_SIZE_8, QSPI_CFG_ADDR_SIZE_16, QSPI_CFG_ADDR_SIZE_24, QSPI_CFG_ADDR_SIZE_32)
      *  @param alt_width Bus width used by alt phase(Valid values are QSPI_CFG_BUS_SINGLE, QSPI_CFG_BUS_DUAL, QSPI_CFG_BUS_QUAD)
-     *  @param alt_size Size in bits used by alt phase(Valid values are QSPI_CFG_ADDR_SIZE_8, QSPI_CFG_ADDR_SIZE_16, QSPI_CFG_ADDR_SIZE_24, QSPI_CFG_ADDR_SIZE_32)
+     *  @param alt_size Size in bits used by alt phase(Valid values are QSPI_CFG_ALT_SIZE_8, QSPI_CFG_ALT_SIZE_16, QSPI_CFG_ALT_SIZE_24, QSPI_CFG_ALT_SIZE_32)
      *  @param data_width Bus width used by data phase(Valid values are QSPI_CFG_BUS_SINGLE, QSPI_CFG_BUS_DUAL, QSPI_CFG_BUS_QUAD)
      *  @param dummy_cycles Number of dummy clock cycles to be used after alt phase
      *
@@ -179,6 +182,7 @@ class QSPI : private NonCopyable<QSPI> {
      */
     qspi_status_t command_transfer(int instruction, int address, const char *tx_buffer, size_t tx_length, const char *rx_buffer, size_t rx_length);
 
+#if !defined(DOXYGEN_ONLY)
 protected:
     /** Acquire exclusive access to this SPI bus
      */
@@ -188,12 +192,6 @@ class QSPI : private NonCopyable<QSPI> {
      */
     virtual void unlock(void);
 
-public:
-    virtual ~QSPI()
-    {
-    }
-
-protected:
     qspi_t _qspi;
 
     bool acquire(void);
@@ -223,6 +221,7 @@ class QSPI : private NonCopyable<QSPI> {
      * This function builds the qspi command struct to be send to Hal
      */
     inline void _build_qspi_command(int instruction, int address, int alt);
+#endif
 };
 
 } // namespace mbed

mbed.h

@@ -73,6 +73,7 @@
 #include "drivers/UARTSerial.h"
 #include "drivers/FlashIAP.h"
 #include "drivers/MbedCRC.h"
+#include "drivers/QSPI.h"
 
 // mbed Internal components
 #include "drivers/Timer.h"