Skip to content

Commit 2e9bb17

Browse files
mmahadevan108mmahadevan108
committed
MCUXpresso: Update Analogin support
Signed-off-by: Mahesh Mahadevan <[email protected]>
1 parent 616fa49 commit 2e9bb17

File tree

7 files changed

+208
-19
lines changed

7 files changed

+208
-19
lines changed

‎targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC/analogin_api.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@
1616
#include "mbed_assert.h"
1717
#include "analogin_api.h"
1818

19-
#if DEVICE_ANALOGIN
19+
#if DEVICE_ANALOGIN && !defined(NXP_LPADC)
2020

2121
#include "cmsis.h"
2222
#include "pinmap.h"

‎targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC/lp_analogin_api.c

Lines changed: 148 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,148 @@
1+
/* mbed Microcontroller Library
2+
* Copyright (c) 2006-2013 ARM Limited
3+
*
4+
* Licensed under the Apache License, Version 2.0 (the "License");
5+
* you may not use this file except in compliance with the License.
6+
* You may obtain a copy of the License at
7+
*
8+
* http://www.apache.org/licenses/LICENSE-2.0
9+
*
10+
* Unless required by applicable law or agreed to in writing, software
11+
* distributed under the License is distributed on an "AS IS" BASIS,
12+
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13+
* See the License for the specific language governing permissions and
14+
* limitations under the License.
15+
*/
16+
#include "mbed_assert.h"
17+
#include "analogin_api.h"
18+
19+
#if DEVICE_ANALOGIN && defined(NXP_LPADC)
20+
21+
#include "cmsis.h"
22+
#include "pinmap.h"
23+
#include "gpio_api.h"
24+
#include "PeripheralNames.h"
25+
#include "fsl_lpadc.h"
26+
#include "fsl_power.h"
27+
#include "PeripheralPins.h"
28+
29+
/* Array of ADC peripheral base address. */
30+
static ADC_Type *const adc_addrs[] = ADC_BASE_PTRS;
31+
extern void ADC_ClockPower_Configuration(void);
32+
33+
#define LPADC_USER_CMDID 1U /* CMD1 */
34+
35+
void analogin_init(analogin_t *obj, PinName pin)
36+
{
37+
gpio_t gpio;
38+
39+
obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
40+
MBED_ASSERT(obj->adc != (ADCName)NC);
41+
42+
uint32_t instance = obj->adc >> ADC_INSTANCE_SHIFT;
43+
lpadc_config_t adc_config;
44+
uint32_t reg;
45+
uint32_t pin_number = pin & 0x1F;
46+
uint8_t port_number = pin / 32;
47+
48+
ADC_ClockPower_Configuration();
49+
50+
LPADC_GetDefaultConfig(&adc_config);
51+
adc_config.enableAnalogPreliminary = true;
52+
#if defined(LPADC_VREF_SOURCE)
53+
adc_config.referenceVoltageSource = LPADC_VREF_SOURCE;
54+
#endif
55+
#if defined(FSL_FEATURE_LPADC_HAS_CTRL_CAL_AVGS) && FSL_FEATURE_LPADC_HAS_CTRL_CAL_AVGS
56+
adc_config.conversionAverageMode = kLPADC_ConversionAverage128;
57+
#endif /* FSL_FEATURE_LPADC_HAS_CTRL_CAL_AVGS */
58+
LPADC_Init(adc_addrs[instance], &adc_config);
59+
60+
#if defined(FSL_FEATURE_LPADC_HAS_CTRL_CALOFS) && FSL_FEATURE_LPADC_HAS_CTRL_CALOFS
61+
#if defined(FSL_FEATURE_LPADC_HAS_OFSTRIM) && FSL_FEATURE_LPADC_HAS_OFSTRIM
62+
/* Request offset calibration. */
63+
if (true == LPADC_DO_OFFSET_CALIBRATION) {
64+
LPADC_DoOffsetCalibration(adc_addrs[instance]);
65+
} else {
66+
LPADC_SetOffsetValue(adc_addrs[instance], LPADC_OFFSET_VALUE_A, LPADC_OFFSET_VALUE_B);
67+
}
68+
#endif /* FSL_FEATURE_LPADC_HAS_OFSTRIM */
69+
/* Request gain calibration. */
70+
LPADC_DoAutoCalibration(adc_addrs[instance]);
71+
#endif /* FSL_FEATURE_LPADC_HAS_CTRL_CALOFS */
72+
73+
#if (defined(FSL_FEATURE_LPADC_HAS_CFG_CALOFS) && FSL_FEATURE_LPADC_HAS_CFG_CALOFS)
74+
/* Do auto calibration. */
75+
LPADC_DoAutoCalibration(adc_addrs[instance]);
76+
#endif /* FSL_FEATURE_LPADC_HAS_CFG_CALOFS */
77+
78+
pinmap_pinout(pin, PinMap_ADC);
79+
80+
reg = IOCON->PIO[port_number][pin_number];
81+
/* Clear the DIGIMODE bit */
82+
reg &= ~IOCON_PIO_DIGIMODE_MASK;
83+
/* For pins PIO0_9, PIO0_11, PIO0_12, PIO0_15, PIO0_18, PIO0_31, PIO1_0 and
84+
PIO1_9, leave ASW bit at '0' in the related IOCON register. */
85+
if (((port_number == 0) && ((pin_number == 9) || (pin_number == 11) || (pin_number == 12) ||
86+
(pin_number == 15) || (pin_number == 18) || (pin_number == 31))) ||
87+
((port_number == 1) && ((pin_number == 0) || (pin_number == 9)))) {
88+
/* Disable Analog Switch Input control */
89+
reg &= ~IOCON_PIO_ASW_MASK;
90+
} else {
91+
/* Enable Analog Switch Input control */
92+
reg |= IOCON_PIO_ASW_MASK;
93+
}
94+
IOCON->PIO[port_number][pin_number] = reg;
95+
96+
/* Need to ensure the pin is in input mode */
97+
gpio_init(&gpio, pin);
98+
gpio_dir(&gpio, PIN_INPUT);
99+
}
100+
101+
uint16_t analogin_read_u16(analogin_t *obj)
102+
{
103+
uint32_t instance = obj->adc >> ADC_INSTANCE_SHIFT;
104+
uint32_t channel = obj->adc & 0xF;
105+
lpadc_conv_trigger_config_t mLpadcTriggerConfigStruct;
106+
lpadc_conv_command_config_t mLpadcCommandConfigStruct;
107+
lpadc_conv_result_t mLpadcResultConfigStruct;
108+
109+
memset(&mLpadcTriggerConfigStruct, 0, sizeof(mLpadcTriggerConfigStruct));
110+
memset(&mLpadcCommandConfigStruct, 0, sizeof(mLpadcCommandConfigStruct));
111+
memset(&mLpadcResultConfigStruct, 0, sizeof(mLpadcResultConfigStruct));
112+
113+
/* Set conversion CMD configuration. */
114+
LPADC_GetDefaultConvCommandConfig(&mLpadcCommandConfigStruct);
115+
mLpadcCommandConfigStruct.channelNumber = channel;
116+
LPADC_SetConvCommandConfig(adc_addrs[instance], LPADC_USER_CMDID, &mLpadcCommandConfigStruct);
117+
118+
/* Set trigger configuration. */
119+
LPADC_GetDefaultConvTriggerConfig(&mLpadcTriggerConfigStruct);
120+
mLpadcTriggerConfigStruct.targetCommandId = LPADC_USER_CMDID;
121+
mLpadcTriggerConfigStruct.enableHardwareTrigger = false;
122+
LPADC_SetConvTriggerConfig(adc_addrs[instance], 0U, &mLpadcTriggerConfigStruct); /* Configurate the trigger0. */
123+
124+
LPADC_DoSoftwareTrigger(adc_addrs[instance], 1U); /* 1U is trigger0 mask. */
125+
126+
#if (defined(FSL_FEATURE_LPADC_FIFO_COUNT) && (FSL_FEATURE_LPADC_FIFO_COUNT == 2U))
127+
while (!LPADC_GetConvResult(adc_addrs[instance], &mLpadcResultConfigStruct, 0U)) {
128+
}
129+
#else
130+
while (!LPADC_GetConvResult(adc_addrs[instance], &mLpadcResultConfigStruct)) {
131+
}
132+
#endif /* FSL_FEATURE_LPADC_FIFO_COUNT */
133+
134+
return ((mLpadcResultConfigStruct.convValue) >> 3U);
135+
}
136+
137+
float analogin_read(analogin_t *obj)
138+
{
139+
uint16_t value = analogin_read_u16(obj);
140+
return (float)value * (1.0f / (float)0xFFFF);
141+
}
142+
143+
const PinMap *analogin_pinmap()
144+
{
145+
return PinMap_ADC;
146+
}
147+
148+
#endif

‎targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_LPCXpresso/device.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,11 @@
2020

2121
#define NUMBER_OF_GPIO_INTS 8
2222

23+
#define LPADC_VREF_SOURCE kLPADC_ReferenceVoltageAlt2
24+
#define LPADC_DO_OFFSET_CALIBRATION false
25+
#define LPADC_OFFSET_VALUE_A 10U
26+
#define LPADC_OFFSET_VALUE_B 10U
27+
2328
#define APP_EXCLUDE_FROM_DEEPSLEEP (kPDRUNCFG_PD_DCDC | kPDRUNCFG_PD_FRO192M | kPDRUNCFG_PD_FRO32K)
2429

2530
/* Defines used by the sleep code */

‎targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_LPCXpresso/mbed_overrides.c

Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -36,16 +36,26 @@ void rtc_setup_oscillator(void)
3636
uint32_t us_ticker_get_clock()
3737
{
3838
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
39-
/* Use 12 MHz clock us ticker timer */
39+
/* Use 96 MHz clock us ticker timer */
4040
CLOCK_AttachClk(kFRO_HF_to_CTIMER0);
4141
return CLOCK_GetFreq(kCLOCK_CTmier0);;
4242
#else
43-
/* Use 12 MHz clock us ticker timer */
43+
/* Use 96 MHz clock us ticker timer */
4444
CLOCK_AttachClk(kFRO_HF_to_CTIMER1);
4545
return CLOCK_GetFreq(kCLOCK_CTmier1);;
4646
#endif
4747
}
4848

49+
void ADC_ClockPower_Configuration(void)
50+
{
51+
/* Set clock source for ADC0 */
52+
CLOCK_SetClkDiv(kCLOCK_DivAdcAsyncClk, 16U, true);
53+
CLOCK_AttachClk(kMAIN_CLK_to_ADC_CLK);
54+
55+
/* Disable LDOGPADC power down */
56+
POWER_DisablePD(kPDRUNCFG_PD_LDOGPADC);
57+
}
58+
4959
void sdio_clock_setup(void)
5060
{
5161
/* Attach main clock to SDIF */

‎targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/drivers/fsl_lpadc.c

Lines changed: 13 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -554,6 +554,19 @@ void LPADC_DoAutoCalibration(ADC_Type *base)
554554
#endif /* FSL_FEATURE_LPADC_HAS_CFG_CALOFS */
555555

556556
#if defined(FSL_FEATURE_LPADC_HAS_CTRL_CALOFS) && FSL_FEATURE_LPADC_HAS_CTRL_CALOFS
557+
/*!
558+
* brief Do offset calibration.
559+
*
560+
* param base LPADC peripheral base address.
561+
*/
562+
void LPADC_DoOffsetCalibration(ADC_Type *base)
563+
{
564+
LPADC_EnableOffsetCalibration(base, true);
565+
while (ADC_STAT_CAL_RDY_MASK != (base->STAT & ADC_STAT_CAL_RDY_MASK))
566+
{
567+
}
568+
}
569+
557570
#if defined(FSL_FEATURE_LPADC_HAS_CTRL_CAL_REQ) && FSL_FEATURE_LPADC_HAS_CTRL_CAL_REQ
558571
/*!
559572
* brief Do auto calibration.
@@ -569,12 +582,6 @@ void LPADC_DoAutoCalibration(ADC_Type *base)
569582
uint32_t GCRa;
570583
uint32_t GCRb;
571584

572-
/* Request offset calibration. */
573-
LPADC_EnableOffsetCalibration(base, true);
574-
while (ADC_STAT_CAL_RDY_MASK != (base->STAT & ADC_STAT_CAL_RDY_MASK))
575-
{
576-
}
577-
578585
/* Request gain calibration. */
579586
base->CTRL |= ADC_CTRL_CAL_REQ_MASK;
580587
while ((ADC_GCC_RDY_MASK != (base->GCC[0] & ADC_GCC_RDY_MASK)) ||

‎targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/drivers/fsl_lpadc.h

Lines changed: 28 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -23,8 +23,8 @@
2323

2424
/*! @name Driver version */
2525
/*@{*/
26-
/*! @brief LPADC driver version 2.0.2. */
27-
#define FSL_LPADC_DRIVER_VERSION (MAKE_VERSION(2, 0, 2))
26+
/*! @brief LPADC driver version 2.0.3. */
27+
#define FSL_LPADC_DRIVER_VERSION (MAKE_VERSION(2, 0, 3))
2828
/*@}*/
2929

3030
/*!
@@ -750,9 +750,6 @@ void LPADC_GetDefaultConvCommandConfig(lpadc_conv_command_config_t *config);
750750
* @bool enable switcher to the calibration function.
751751
*/
752752
void LPADC_EnableCalibration(ADC_Type *base, bool enable);
753-
#endif /* FSL_FEATURE_LPADC_HAS_CFG_CALOFS */
754-
755-
#if !(defined(FSL_FEATURE_LPADC_HAS_CTRL_CALOFS) && FSL_FEATURE_LPADC_HAS_CTRL_CALOFS)
756753
#if defined(FSL_FEATURE_LPADC_HAS_OFSTRIM) && FSL_FEATURE_LPADC_HAS_OFSTRIM
757754
/*!
758755
* @brief Set proper offset value to trim ADC.
@@ -767,11 +764,7 @@ static inline void LPADC_SetOffsetValue(ADC_Type *base, uint32_t value)
767764
{
768765
base->OFSTRIM = (value & ADC_OFSTRIM_OFSTRIM_MASK) >> ADC_OFSTRIM_OFSTRIM_SHIFT;
769766
}
770-
#endif /* FSL_FEATURE_LPADC_HAS_OFSTRIM */
771-
#endif /* FSL_FEATURE_LPADC_HAS_CTRL_CALOFS */
772767

773-
#if defined(FSL_FEATURE_LPADC_HAS_CFG_CALOFS) && FSL_FEATURE_LPADC_HAS_CFG_CALOFS
774-
#if defined(FSL_FEATURE_LPADC_HAS_OFSTRIM) && FSL_FEATURE_LPADC_HAS_OFSTRIM
775768
/*!
776769
* @brief Do auto calibration.
777770
*
@@ -789,6 +782,23 @@ void LPADC_DoAutoCalibration(ADC_Type *base);
789782
#endif /* FSL_FEATURE_LPADC_HAS_CFG_CALOFS */
790783

791784
#if defined(FSL_FEATURE_LPADC_HAS_CTRL_CALOFS) && FSL_FEATURE_LPADC_HAS_CTRL_CALOFS
785+
#if defined(FSL_FEATURE_LPADC_HAS_OFSTRIM) && FSL_FEATURE_LPADC_HAS_OFSTRIM
786+
/*!
787+
* @brief Set proper offset value to trim ADC.
788+
*
789+
* Set the offset trim value for offset calibration manually.
790+
*
791+
* @param base LPADC peripheral base address.
792+
* @param valueA Setting offset value A.
793+
* @param valueB Setting offset value B.
794+
* @note In normal adc sequence, the values are automatically calculated by LPADC_EnableOffsetCalibration.
795+
*/
796+
static inline void LPADC_SetOffsetValue(ADC_Type *base, uint32_t valueA, uint32_t valueB)
797+
{
798+
base->OFSTRIM = ADC_OFSTRIM_OFSTRIM_A(valueA) | ADC_OFSTRIM_OFSTRIM_B(valueB);
799+
}
800+
#endif /* FSL_FEATURE_LPADC_HAS_OFSTRIM */
801+
792802
/*!
793803
* @brief Enable the offset calibration function.
794804
*
@@ -807,14 +817,22 @@ static inline void LPADC_EnableOffsetCalibration(ADC_Type *base, bool enable)
807817
}
808818
}
809819

820+
/*!
821+
* @brief Do offset calibration.
822+
*
823+
* @param base LPADC peripheral base address.
824+
*/
825+
void LPADC_DoOffsetCalibration(ADC_Type *base);
826+
827+
#if defined(FSL_FEATURE_LPADC_HAS_CTRL_CAL_REQ) && FSL_FEATURE_LPADC_HAS_CTRL_CAL_REQ
810828
/*!
811829
* brief Do auto calibration.
812830
*
813831
* param base LPADC peripheral base address.
814832
*/
815833
void LPADC_DoAutoCalibration(ADC_Type *base);
816-
817834
#endif /* FSL_FEATURE_LPADC_HAS_CTRL_CAL_REQ */
835+
#endif /* FSL_FEATURE_LPADC_HAS_CTRL_CALOFS */
818836
/* @} */
819837

820838
#if defined(__cplusplus)

‎targets/targets.json

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2075,6 +2075,7 @@
20752075
"device_has_add": [
20762076
"USTICKER",
20772077
"RTC",
2078+
"ANALOGIN",
20782079
"I2C",
20792080
"I2CSLAVE",
20802081
"INTERRUPTIN",

0 commit comments

Comments
 (0)