[NRF5]

nvlsianpu · nvlsianpu · commit 2ff572682798 · 2017-04-26T15:19:38.000+02:00
HAL driver: Add changes from needad for nrf52840 support
us_ticker, spi, sleep, serial, pwmout, pinmap, object, i2c, gpio, analogin

Add compatibility patches for:
- SoftDevice headers renamed (redirec by a few h files)
- sdk configuration (redirect by sdk_config.h files)
- renaming of func in softdevice handler module
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/ble.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/ble.h
@@ -0,0 +1 @@
+#include ".\nrf_ble.h"
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/ble_err.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/ble_err.h
@@ -0,0 +1 @@
+#include ".\nrf_ble_err.h"
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/ble_gap.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/ble_gap.h
@@ -0,0 +1 @@
+#include ".\nrf_ble_gap.h"
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/ble_gatt.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/ble_gatt.h
@@ -0,0 +1 @@
+#include ".\nrf_ble_gatt.h"
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/ble_gattc.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/ble_gattc.h
@@ -0,0 +1 @@
+#include ".\nrf_ble_gattc.h"
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/ble_gatts.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/ble_gatts.h
@@ -0,0 +1 @@
+#include ".\nrf_ble_gatts.h"
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/ble_hci.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/ble_hci.h
@@ -0,0 +1 @@
+#include ".\nrf_ble_hci.h"
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/ble_l2capi.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/ble_l2capi.h
@@ -0,0 +1 @@
+#include ".\nrf_ble_l2cap.h"
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/ble_ranges.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/ble_ranges.h
@@ -0,0 +1 @@
+#include ".\nrf_ble_ranges.h"
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/ble_types.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/ble_types.h
@@ -0,0 +1 @@
+#include ".\nrf_ble_types.h"
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk_patch/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk_patch/sdk_config.h
@@ -0,0 +1,19 @@
+#ifndef _SDK_CONFIG_H_
+#define _SDK_CONFIG_H_
+
+#include "nrf_drv_config.h"
+
+#define UART_DEFAULT_CONFIG_BAUDRATE UART0_CONFIG_BAUDRATE
+#define UART_DEFAULT_CONFIG_PARITY   UART0_CONFIG_PARITY
+#define UART_DEFAULT_CONFIG_HWFC     UART0_CONFIG_HWFC
+#define CTS_PIN_NUMBER               UART0_CONFIG_PSEL_CTS
+#define RTS_PIN_NUMBER               UART0_CONFIG_PSEL_RTS
+
+#define SPIS_DEFAULT_ORC                 NRF_DRV_SPIS_DEFAULT_ORC
+#define SPIS_DEFAULT_CONFIG_IRQ_PRIORITY SPIS1_CONFIG_IRQ_PRIORITY;
+#define SPIS_DEFAULT_ORC                 NRF_DRV_SPIS_DEFAULT_ORC
+#define SPIS_DEFAULT_DEF                 NRF_DRV_SPIS_DEFAULT_DEF
+
+#define SPI_DEFAULT_CONFIG_IRQ_PRIORITY  SPI1_CONFIG_IRQ_PRIORITY
+
+#endif
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/ble.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/ble.h
@@ -0,0 +1 @@
+#include ".\nrf_ble.h"
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/ble_err.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/ble_err.h
@@ -0,0 +1 @@
+#include ".\nrf_ble_err.h"
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/ble_gap.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/ble_gap.h
@@ -0,0 +1 @@
+#include ".\nrf_ble_gap.h"
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/ble_gatt.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/ble_gatt.h
@@ -0,0 +1 @@
+#include ".\nrf_ble_gatt.h"
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/ble_gattc.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/ble_gattc.h
@@ -0,0 +1 @@
+#include ".\nrf_ble_gattc.h"
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/ble_gatts.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/ble_gatts.h
@@ -0,0 +1 @@
+#include ".\nrf_ble_gatts.h"
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/ble_hci.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/ble_hci.h
@@ -0,0 +1 @@
+#include ".\nrf_ble_hci.h"
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/ble_l2capi.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/ble_l2capi.h
@@ -0,0 +1 @@
+#include ".\nrf_ble_l2cap.h"
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/ble_ranges.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/ble_ranges.h
@@ -0,0 +1 @@
+#include ".\nrf_ble_ranges.h"
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/ble_types.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/ble_types.h
@@ -0,0 +1 @@
+#include ".\nrf_ble_types.h"
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk_patch/sdk_config.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk_patch/sdk_config.h
@@ -0,0 +1,21 @@
+#ifndef _SDK_CONFIG_H_
+#define _SDK_CONFIG_H_
+
+#include "nrf_drv_config.h"
+
+#define UART_DEFAULT_CONFIG_BAUDRATE UART0_CONFIG_BAUDRATE
+#define UART_DEFAULT_CONFIG_PARITY   UART0_CONFIG_PARITY
+#define UART_DEFAULT_CONFIG_HWFC     UART0_CONFIG_HWFC
+#define CTS_PIN_NUMBER               UART0_CONFIG_PSEL_CTS
+#define RTS_PIN_NUMBER               UART0_CONFIG_PSEL_RTS
+
+#define SPIS_DEFAULT_ORC                 NRF_DRV_SPIS_DEFAULT_ORC
+#define SPIS_DEFAULT_CONFIG_IRQ_PRIORITY SPIS1_CONFIG_IRQ_PRIORITY;
+#define SPIS_DEFAULT_ORC                 NRF_DRV_SPIS_DEFAULT_ORC
+#define SPIS_DEFAULT_DEF                 NRF_DRV_SPIS_DEFAULT_DEF
+
+#define SPI_DEFAULT_CONFIG_IRQ_PRIORITY  SPI1_CONFIG_IRQ_PRIORITY
+
+#define PWM_DEFAULT_CONFIG_IRQ_PRIORITY PWM0_CONFIG_IRQ_PRIORITY
+
+#endif
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/softdevice/common/softdevice_handler/softdevice_handler.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/softdevice/common/softdevice_handler/softdevice_handler.h
@@ -232,7 +232,7 @@ uint32_t softdevice_enable(ble_enable_params_t * p_ble_enable_params);
 /**@cond NO_DOXYGEN */
 void intern_softdevice_events_execute(void);
 
-
+#define softdevice_handler_is_enabled softdevice_handler_isEnabled
 /**@endcond */
 
 #endif // SOFTDEVICE_HANDLER_H__
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/analogin_api.c b/targets/TARGET_NORDIC/TARGET_NRF5/analogin_api.c
@@ -13,6 +13,8 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+#ifndef TARGET_MCU_NRF51822
  
 #include "mbed_assert.h"
 #include "analogin_api.h"
@@ -26,6 +28,11 @@
 #define ADC_12BIT_RANGE 0xFFF
 #define ADC_RANGE       ADC_12BIT_RANGE
 
+#ifdef TARGET_SDK13
+__STATIC_INLINE nrf_saadc_input_t nrf_drv_saadc_gpio_to_ain(uint32_t pin);
+#endif
+
+
 static void analog_in_event_handler(nrf_drv_saadc_evt_t const *p_event)// type of nrf_drv_saadc_event_handler_t 
 {
     (void) p_event;
@@ -88,4 +95,36 @@ float analogin_read(analogin_t *obj)
     return (float)value * (1.0f / (float)ADC_RANGE);
 }
 
+#ifdef TARGET_SDK13
+/**
+ * @brief Function for converting a GPIO pin number to an analog input pin number used in the channel
+ *        configuration.
+ *
+ * @param[in]  pin GPIO pin.
+ *
+ * @return     Value representing an analog input pin. The function returns @ref NRF_SAADC_INPUT_DISABLED
+ *             if the specified pin is not an analog input.
+ */
+__STATIC_INLINE nrf_saadc_input_t nrf_drv_saadc_gpio_to_ain(uint32_t pin)
+{
+    // AIN0 - AIN3
+    if (pin >= 2 && pin <= 5)
+    {
+        //0 means "not connected", hence this "+ 1"
+        return (nrf_saadc_input_t)(pin - 2 + 1);
+    }
+    // AIN4 - AIN7
+    else if (pin >= 28 && pin <= 31)
+    {
+        return (nrf_saadc_input_t)(pin - 24 + 1);
+    }
+    else
+    {
+        return NRF_SAADC_INPUT_DISABLED;
+    }
+}
+#endif // TARGET_SDK13
+
 #endif // DEVICE_ANALOGIN
+
+#endif // !TARGET_MCU_NRF51822
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/gpio_api.c b/targets/TARGET_NORDIC/TARGET_NRF5/gpio_api.c
@@ -22,8 +22,12 @@
 
 #if defined(TARGET_MCU_NRF51822)
     #define GPIO_PIN_COUNT 31
-#else
+#elif defined(TARGET_MCU_NRF52832)
     #define GPIO_PIN_COUNT 32
+#elif defined(TARGET_MCU_NRF52840)
+    #define GPIO_PIN_COUNT 48
+#else
+    #error not recognized gpio count for mcu
 #endif
 
 typedef struct {
@@ -36,8 +40,14 @@ typedef struct {
     bool         irq_rise     : 1;
 } gpio_cfg_t;
 
-uint32_t m_gpio_initialized;
-gpio_cfg_t m_gpio_cfg[GPIO_PIN_COUNT];
+#if GPIO_PIN_COUNT > 32
+    typedef uint64_t gpio_mask_t;
+#else
+    typedef uint32_t gpio_mask_t;
+#endif
+
+static gpio_mask_t m_gpio_initialized;
+static gpio_cfg_t  m_gpio_cfg[GPIO_PIN_COUNT];
 
 
 /***********
@@ -46,15 +56,15 @@ gpio_cfg_t m_gpio_cfg[GPIO_PIN_COUNT];
 
 static gpio_irq_handler m_irq_handler;
 static uint32_t m_channel_ids[GPIO_PIN_COUNT] = {0};
-uint32_t m_gpio_irq_enabled;
+static uint32_t m_gpio_irq_enabled;
 
 
 static void gpiote_irq_handler(nrf_drv_gpiote_pin_t pin, nrf_gpiote_polarity_t action)
 {
     nrf_gpio_pin_sense_t sense =  nrf_gpio_pin_sense_get(pin);
     gpio_irq_event event = (sense == NRF_GPIO_PIN_SENSE_LOW) ? IRQ_RISE : IRQ_FALL;
     
-    if (m_gpio_irq_enabled & (1UL << pin)) {
+    if (m_gpio_irq_enabled & ((gpio_mask_t)1 << pin)) {
         if (((event == IRQ_RISE) && m_gpio_cfg[pin].irq_rise)
             || ((event == IRQ_FALL) && m_gpio_cfg[pin].irq_fall)) {
                 m_irq_handler(m_channel_ids[pin], event);
@@ -79,20 +89,26 @@ void gpio_init(gpio_t *obj, PinName pin)
     m_gpio_cfg[obj->pin].used_as_gpio = true;
 }
 
+#ifdef TARGET_SDK11
+__STATIC_INLINE uint32_t nrf_gpio_pin_out_read(uint32_t pin)
+{
+    return (NRF_GPIO->OUTSET & (1UL << (pin)));
+}
+#endif
 
 int gpio_read(gpio_t *obj)
 {
     MBED_ASSERT(obj->pin != (PinName)NC);
     if (m_gpio_cfg[obj->pin].direction == PIN_OUTPUT) {
-        return ((NRF_GPIO->OUTSET & (1UL << obj->pin)) ? 1 : 0);
+        return (nrf_gpio_pin_out_read(obj->pin) ? 1 : 0);
     } else {
         return nrf_gpio_pin_read(obj->pin);
     }
 }
 
 static void gpiote_pin_uninit(uint8_t pin)
 {
-    if (m_gpio_initialized & (1UL << pin)) {
+    if (m_gpio_initialized & ((gpio_mask_t)1UL << pin)) {
         if ((m_gpio_cfg[pin].direction == PIN_OUTPUT) && (!m_gpio_cfg[pin].used_as_irq)) {
             nrf_drv_gpiote_out_uninit(pin);
         }
@@ -116,7 +132,7 @@ static void gpio_apply_config(uint8_t pin)
             if (m_gpio_cfg[pin].used_as_irq) {
                 cfg.pull = NRF_GPIO_PIN_PULLUP;
                 nrf_drv_gpiote_in_init(pin, &cfg, gpiote_irq_handler);
-                if ((m_gpio_irq_enabled & (1 << pin))
+                if ((m_gpio_irq_enabled & ((gpio_mask_t)1 << pin))
                     && (m_gpio_cfg[pin].irq_rise || m_gpio_cfg[pin].irq_fall))
                 {
                     nrf_drv_gpiote_in_event_enable(pin, true);
@@ -142,17 +158,17 @@ static void gpio_apply_config(uint8_t pin)
             nrf_drv_gpiote_out_config_t cfg = GPIOTE_CONFIG_OUT_SIMPLE(m_gpio_cfg[pin].init_high);
             nrf_drv_gpiote_out_init(pin, &cfg);
         }
-        m_gpio_initialized |= (1UL << pin);
+        m_gpio_initialized |= ((gpio_mask_t)1UL << pin);
     }
     else {
-        m_gpio_initialized &= ~(1UL << pin);
+        m_gpio_initialized &= ~((gpio_mask_t)1UL << pin);
     }
 }
 
 
 void gpio_mode(gpio_t *obj, PinMode mode)
 {
-    MBED_ASSERT(obj->pin <= GPIO_PIN_COUNT);
+    MBED_ASSERT(obj->pin != (PinName)NC);
     
     gpiote_pin_uninit(obj->pin); // try to uninitialize gpio before a change.
     
@@ -163,7 +179,7 @@ void gpio_mode(gpio_t *obj, PinMode mode)
 
 void gpio_dir(gpio_t *obj, PinDirection direction)
 {
-    MBED_ASSERT(obj->pin <= GPIO_PIN_COUNT);
+    MBED_ASSERT(obj->pin != (PinName)NC);
     
     gpiote_pin_uninit(obj->pin); // try to uninitialize gpio before a change.
     
@@ -211,7 +227,7 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
 {
     gpio_cfg_t* cfg = &m_gpio_cfg[obj->ch];
     bool irq_enabled_before =
-        (m_gpio_irq_enabled & (1 << obj->ch)) &&
+        (m_gpio_irq_enabled & ((gpio_mask_t)1 << obj->ch)) &&
         (cfg->irq_rise || cfg->irq_fall);
 
     if (event == IRQ_RISE) {
@@ -235,7 +251,7 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
 
 void gpio_irq_enable(gpio_irq_t *obj)
 {
-    m_gpio_irq_enabled |= (1 << obj->ch);
+    m_gpio_irq_enabled |= ((gpio_mask_t)1 << obj->ch);
     if (m_gpio_cfg[obj->ch].irq_rise || m_gpio_cfg[obj->ch].irq_fall) {
         nrf_drv_gpiote_in_event_enable(obj->ch, true);
     }
@@ -244,6 +260,6 @@ void gpio_irq_enable(gpio_irq_t *obj)
 
 void gpio_irq_disable(gpio_irq_t *obj)
 {
-    m_gpio_irq_enabled &= ~(1 << obj->ch);
+    m_gpio_irq_enabled &= ~((gpio_mask_t)1 << obj->ch);
     nrf_drv_gpiote_in_event_disable(obj->ch);
 }
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/i2c_api.c b/targets/TARGET_NORDIC/TARGET_NRF5/i2c_api.c
@@ -45,7 +45,7 @@
 #include "mbed_error.h"
 #include "nrf_twi.h"
 #include "nrf_drv_common.h"
-#include "nrf_drv_config.h"
+#include "sdk_config.h"
 #include "app_util_platform.h"
 #include "nrf_gpio.h"
 #include "nrf_delay.h"
@@ -62,6 +62,11 @@
 #endif
 #define TWI_INFO(obj)   (&m_twi_info[TWI_IDX(obj)])
 
+#ifdef TARGET_SDK13
+    #define TWI0_INSTANCE_INDEX 0
+    #define TWI1_INSTANCE_INDEX TWI0_INSTANCE_INDEX+TWI0_ENABLED
+#endif
+
 typedef struct {
     bool                initialized;
     uint32_t            pselsda;
@@ -113,7 +118,7 @@ static const peripheral_handler_desc_t twi_handlers[TWI_COUNT] =
 };
 #ifdef NRF51
     #define TWI_IRQ_PRIORITY  APP_IRQ_PRIORITY_LOW
-#elif defined(NRF52)
+#elif defined(NRF52) || defined(NRF52840_XXAA)
     #define TWI_IRQ_PRIORITY  APP_IRQ_PRIORITY_LOWEST
 #endif
 
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/objects.h b/targets/TARGET_NORDIC/TARGET_NRF5/objects.h
@@ -57,9 +57,6 @@ struct spi_s {
 };
 
 struct port_s {
-    __IO uint32_t *reg_cnf;
-    __IO uint32_t *reg_out;
-    __I  uint32_t *reg_in;
     PortName port;
     uint32_t mask;
 };
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/pinmap.c b/targets/TARGET_NORDIC/TARGET_NRF5/pinmap.c
@@ -16,6 +16,7 @@
 #include "mbed_assert.h"
 #include "mbed_error.h"
 #include "pinmap.h"
+#include "nrf_gpio.h"
 
 void pin_function(PinName pin, int function)
 {
@@ -29,7 +30,12 @@ void pin_mode(PinName pin, PinMode mode)
     MBED_ASSERT(pin != (PinName)NC);
 
     uint32_t pin_number = (uint32_t)pin;
-
-    NRF_GPIO->PIN_CNF[pin_number] &= ~GPIO_PIN_CNF_PULL_Msk;
-    NRF_GPIO->PIN_CNF[pin_number] |= (mode << GPIO_PIN_CNF_PULL_Pos);
+    
+#ifdef TARGET_SDK11
+    NRF_GPIO_Type * reg = NRF_GPIO;
+#else
+    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
+#endif
+    reg->PIN_CNF[pin_number] &= ~GPIO_PIN_CNF_PULL_Msk;
+    reg->PIN_CNF[pin_number] |= (mode << GPIO_PIN_CNF_PULL_Pos);
 }
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/port_api.c b/targets/TARGET_NORDIC/TARGET_NRF5/port_api.c
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/pwmout_api.c b/targets/TARGET_NORDIC/TARGET_NRF5/pwmout_api.c
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/serial_api.c b/targets/TARGET_NORDIC/TARGET_NRF5/serial_api.c
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/sleep.c b/targets/TARGET_NORDIC/TARGET_NRF5/sleep.c
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/spi_api.c b/targets/TARGET_NORDIC/TARGET_NRF5/spi_api.c
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/us_ticker.c b/targets/TARGET_NORDIC/TARGET_NRF5/us_ticker.c
diff --git a/targets/targets.json b/targets/targets.json
