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STM QSPI driver: Add explicit pinmap support
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‎targets/TARGET_STM/qspi_api.c

Lines changed: 105 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -381,7 +381,13 @@ qspi_status_t qspi_prepare_command(const qspi_command_t *command, QSPI_CommandTy
381381

382382

383383
#if defined(OCTOSPI1)
384-
qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel, uint32_t hz, uint8_t mode)
384+
#if EXPLICIT_PINMAP_READY
385+
#define QSPI_INIT_DIRECT qspi_init_direct
386+
qspi_status_t qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap, uint32_t hz, uint8_t mode)
387+
#else
388+
#define QSPI_INIT_DIRECT _qspi_init_direct
389+
static qspi_status_t _qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap, uint32_t hz, uint8_t mode)
390+
#endif
385391
{
386392
OSPIM_CfgTypeDef OSPIM_Cfg_Struct = {0};
387393
debug_if(qspi_api_c_debug, "qspi_init mode %u\n", mode);
@@ -403,25 +409,8 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
403409
obj->handle.Init.DelayHoldQuarterCycle = HAL_OSPI_DHQC_ENABLE;
404410
obj->handle.Init.ChipSelectBoundary = 0;
405411

406-
QSPIName qspiio0name = (QSPIName)pinmap_peripheral(io0, PinMap_QSPI_DATA0);
407-
QSPIName qspiio1name = (QSPIName)pinmap_peripheral(io1, PinMap_QSPI_DATA1);
408-
QSPIName qspiio2name = (QSPIName)pinmap_peripheral(io2, PinMap_QSPI_DATA2);
409-
QSPIName qspiio3name = (QSPIName)pinmap_peripheral(io3, PinMap_QSPI_DATA3);
410-
QSPIName qspiclkname = (QSPIName)pinmap_peripheral(sclk, PinMap_QSPI_SCLK);
411-
QSPIName qspisselname = (QSPIName)pinmap_peripheral(ssel, PinMap_QSPI_SSEL);
412-
413-
QSPIName qspi_data_first = (QSPIName)pinmap_merge(qspiio0name, qspiio1name);
414-
QSPIName qspi_data_second = (QSPIName)pinmap_merge(qspiio2name, qspiio3name);
415-
QSPIName qspi_data_third = (QSPIName)pinmap_merge(qspiclkname, qspisselname);
416-
417-
if (qspi_data_first != qspi_data_second || qspi_data_second != qspi_data_third ||
418-
qspi_data_first != qspi_data_third) {
419-
debug_if(qspi_api_c_debug, "QSPI_STATUS_INVALID_PARAMETER error\n");
420-
return QSPI_STATUS_INVALID_PARAMETER;
421-
}
422-
423412
// tested all combinations, take first
424-
obj->qspi = qspi_data_third;
413+
obj->qspi = pinmap->peripheral;
425414

426415
#if defined(OCTOSPI1)
427416
if (obj->qspi == QSPI_1) {
@@ -452,19 +441,25 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
452441
#endif
453442

454443
// pinmap for pins (enable clock)
455-
obj->io0 = io0;
456-
pinmap_pinout(io0, PinMap_QSPI_DATA0);
457-
obj->io1 = io1;
458-
pinmap_pinout(io1, PinMap_QSPI_DATA1);
459-
obj->io2 = io2;
460-
pinmap_pinout(io2, PinMap_QSPI_DATA2);
461-
obj->io3 = io3;
462-
pinmap_pinout(io3, PinMap_QSPI_DATA3);
463-
464-
obj->sclk = sclk;
465-
pinmap_pinout(sclk, PinMap_QSPI_SCLK);
466-
obj->ssel = ssel;
467-
pinmap_pinout(ssel, PinMap_QSPI_SSEL);
444+
obj->io0 = pinmap->data0_pin;
445+
pin_function(pinmap->data0_pin, pinmap->data0_function);
446+
pin_mode(pinmap->data0_pin, PullNone);
447+
obj->io1 = pinmap->data1_pin;
448+
pin_function(pinmap->data1_pin, pinmap->data1_function);
449+
pin_mode(pinmap->data1_pin, PullNone);
450+
obj->io2 = pinmap->data2_pin;
451+
pin_function(pinmap->data2_pin, pinmap->data2_function);
452+
pin_mode(pinmap->data2_pin, PullNone);
453+
obj->io3 = pinmap->data3_pin;
454+
pin_function(pinmap->data3_pin, pinmap->data3_function);
455+
pin_mode(pinmap->data3_pin, PullNone);
456+
457+
obj->sclk = pinmap->sclk_pin;
458+
pin_function(pinmap->sclk_pin, pinmap->sclk_pin);
459+
pin_mode(pinmap->sclk_pin, PullNone);
460+
obj->ssel = pinmap->ssel_pin;
461+
pin_function(pinmap->ssel_pin, pinmap->ssel_pin);
462+
pin_mode(pinmap->ssel_pin, PullNone);
468463

469464
/* The OctoSPI IO Manager OCTOSPIM configuration is supported in a simplified mode in mbed-os
470465
* QSPI1 signals are mapped to port 1 and QSPI2 signals are mapped to port 2.
@@ -490,8 +485,46 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
490485

491486
return qspi_frequency(obj, hz);
492487
}
493-
#else /* OCTOSPI */
488+
494489
qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel, uint32_t hz, uint8_t mode)
490+
{
491+
QSPIName qspiio0name = (QSPIName)pinmap_peripheral(io0, PinMap_QSPI_DATA0);
492+
QSPIName qspiio1name = (QSPIName)pinmap_peripheral(io1, PinMap_QSPI_DATA1);
493+
QSPIName qspiio2name = (QSPIName)pinmap_peripheral(io2, PinMap_QSPI_DATA2);
494+
QSPIName qspiio3name = (QSPIName)pinmap_peripheral(io3, PinMap_QSPI_DATA3);
495+
QSPIName qspiclkname = (QSPIName)pinmap_peripheral(sclk, PinMap_QSPI_SCLK);
496+
QSPIName qspisselname = (QSPIName)pinmap_peripheral(ssel, PinMap_QSPI_SSEL);
497+
498+
QSPIName qspi_data_first = (QSPIName)pinmap_merge(qspiio0name, qspiio1name);
499+
QSPIName qspi_data_second = (QSPIName)pinmap_merge(qspiio2name, qspiio3name);
500+
QSPIName qspi_data_third = (QSPIName)pinmap_merge(qspiclkname, qspisselname);
501+
502+
if (qspi_data_first != qspi_data_second || qspi_data_second != qspi_data_third ||
503+
qspi_data_first != qspi_data_third) {
504+
return QSPI_STATUS_INVALID_PARAMETER;
505+
}
506+
507+
int peripheral = (int)qspi_data_first;
508+
int function_io0 = (int)pinmap_find_function(io0, PinMap_QSPI_DATA0);
509+
int function_io1 = (int)pinmap_find_function(io1, PinMap_QSPI_DATA1);
510+
int function_io2 = (int)pinmap_find_function(io2, PinMap_QSPI_DATA2);
511+
int function_io3 = (int)pinmap_find_function(io3, PinMap_QSPI_DATA3);
512+
int function_sclk = (int)pinmap_find_function(sclk, PinMap_QSPI_SCLK);
513+
int function_ssel = (int)pinmap_find_function(ssel, PinMap_QSPI_SSEL);
514+
515+
const qspi_pinmap_t explicit_pinmap = {peripheral, io0, function_io0, io1, function_io1, io2, function_io2, io3, function_io3, sclk, function_sclk, ssel, function_ssel};
516+
517+
QSPI_INIT_DIRECT(obj, &explicit_pinmap, hz, mode);
518+
}
519+
520+
#else /* OCTOSPI */
521+
#if EXPLICIT_PINMAP_READY
522+
#define QSPI_INIT_DIRECT qspi_init_direct
523+
qspi_status_t qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap, uint32_t hz, uint8_t mode)
524+
#else
525+
#define QSPI_INIT_DIRECT _qspi_init_direct
526+
static qspi_status_t _qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap, uint32_t hz, uint8_t mode)
527+
#endif
495528
{
496529
debug_if(qspi_api_c_debug, "qspi_init mode %u\n", mode);
497530
// Enable interface clock for QSPI
@@ -527,6 +560,35 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
527560

528561
obj->handle.Init.ClockMode = mode == 0 ? QSPI_CLOCK_MODE_0 : QSPI_CLOCK_MODE_3;
529562

563+
// tested all combinations, take first
564+
obj->handle.Instance = (QUADSPI_TypeDef *)pinmap->peripheral;
565+
566+
// pinmap for pins (enable clock)
567+
obj->io0 = pinmap->data0_pin;
568+
pin_function(pinmap->data0_pin, pinmap->data0_function);
569+
pin_mode(pinmap->data0_pin, PullNone);
570+
obj->io1 = pinmap->data1_pin;
571+
pin_function(pinmap->data1_pin, pinmap->data1_function);
572+
pin_mode(pinmap->data1_pin, PullNone);
573+
obj->io2 = pinmap->data2_pin;
574+
pin_function(pinmap->data2_pin, pinmap->data2_function);
575+
pin_mode(pinmap->data2_pin, PullNone);
576+
obj->io3 = pinmap->data3_pin;
577+
pin_function(pinmap->data3_pin, pinmap->data3_function);
578+
pin_mode(pinmap->data3_pin, PullNone);
579+
580+
obj->sclk = pinmap->sclk_pin;
581+
pin_function(pinmap->sclk_pin, pinmap->sclk_pin);
582+
pin_mode(pinmap->sclk_pin, PullNone);
583+
obj->ssel = pinmap->ssel_pin;
584+
pin_function(pinmap->ssel_pin, pinmap->ssel_pin);
585+
pin_mode(pinmap->ssel_pin, PullNone);
586+
587+
return qspi_frequency(obj, hz);
588+
}
589+
590+
qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel, uint32_t hz, uint8_t mode)
591+
{
530592
QSPIName qspiio0name = (QSPIName)pinmap_peripheral(io0, PinMap_QSPI_DATA0);
531593
QSPIName qspiio1name = (QSPIName)pinmap_peripheral(io1, PinMap_QSPI_DATA1);
532594
QSPIName qspiio2name = (QSPIName)pinmap_peripheral(io2, PinMap_QSPI_DATA2);
@@ -543,26 +605,19 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
543605
return QSPI_STATUS_INVALID_PARAMETER;
544606
}
545607

546-
// tested all combinations, take first
547-
obj->handle.Instance = (QUADSPI_TypeDef *)qspi_data_first;
608+
int peripheral = (int)qspi_data_first;
609+
int function_io0 = (int)pinmap_find_function(io0, PinMap_QSPI_DATA0);
610+
int function_io1 = (int)pinmap_find_function(io1, PinMap_QSPI_DATA1);
611+
int function_io2 = (int)pinmap_find_function(io2, PinMap_QSPI_DATA2);
612+
int function_io3 = (int)pinmap_find_function(io3, PinMap_QSPI_DATA3);
613+
int function_sclk = (int)pinmap_find_function(sclk, PinMap_QSPI_SCLK);
614+
int function_ssel = (int)pinmap_find_function(ssel, PinMap_QSPI_SSEL);
548615

549-
// pinmap for pins (enable clock)
550-
obj->io0 = io0;
551-
pinmap_pinout(io0, PinMap_QSPI_DATA0);
552-
obj->io1 = io1;
553-
pinmap_pinout(io1, PinMap_QSPI_DATA1);
554-
obj->io2 = io2;
555-
pinmap_pinout(io2, PinMap_QSPI_DATA2);
556-
obj->io3 = io3;
557-
pinmap_pinout(io3, PinMap_QSPI_DATA3);
558-
559-
obj->sclk = sclk;
560-
pinmap_pinout(sclk, PinMap_QSPI_SCLK);
561-
obj->ssel = ssel;
562-
pinmap_pinout(ssel, PinMap_QSPI_SSEL);
616+
const qspi_pinmap_t explicit_pinmap = {peripheral, io0, function_io0, io1, function_io1, io2, function_io2, io3, function_io3, sclk, function_sclk, ssel, function_ssel};
563617

564-
return qspi_frequency(obj, hz);
618+
QSPI_INIT_DIRECT(obj, &explicit_pinmap, hz, mode);
565619
}
620+
566621
#endif /* OCTOSPI */
567622

568623

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