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Partial revert of "[STM32Fxxx] Fix issue #816"
This is a partial revert of 07b841b and currently we are only reverting the STM32F0xx family because new fix will be presented that's why we want to keep, still the original solution only F1xx family (it will be fixed in future). Change-Id: I147065299310c9fea499bf3ced8808a44699a1a1
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hal/targets/hal/TARGET_STM/TARGET_STM32F0/us_ticker.c

Lines changed: 16 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,6 @@ static int us_ticker_inited = 0;
4141
volatile uint32_t SlaveCounter = 0;
4242
volatile uint32_t oc_int_part = 0;
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volatile uint16_t oc_rem_part = 0;
44-
volatile uint16_t cnt_val = 0;
4544

4645
void set_compare(uint16_t count) {
4746
TimMasterHandle.Instance = TIM_MST;
@@ -59,15 +58,24 @@ void us_ticker_init(void) {
5958
}
6059

6160
uint32_t us_ticker_read() {
62-
uint32_t counter;
61+
uint32_t counter, counter2;
6362
if (!us_ticker_inited) us_ticker_init();
64-
65-
//Current value of TIM_MST->CNT is stored in cnt_val and is
66-
//updated in interrupt context
63+
// A situation might appear when Master overflows right after Slave is read and before the
64+
// new (overflowed) value of Master is read. Which would make the code below consider the
65+
// previous (incorrect) value of Slave and the new value of Master, which would return a
66+
// value in the past. Avoid this by computing consecutive values of the timer until they
67+
// are properly ordered.
6768
counter = (uint32_t)(SlaveCounter << 16);
68-
counter += cnt_val;
69-
70-
return counter;
69+
counter += TIM_MST->CNT;
70+
while (1) {
71+
counter2 = (uint32_t)(SlaveCounter << 16);
72+
counter2 += TIM_MST->CNT;
73+
if (counter2 > counter) {
74+
break;
75+
}
76+
counter = counter2;
77+
}
78+
return counter2;
7179
}
7280

7381
void us_ticker_set_interrupt(timestamp_t timestamp) {

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