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jeromecoutantadbridge
jeromecoutant
authored and
adbridge
committed
STM32: RTC_LSI macro is replaced by lse_available config
1 parent 8359253 commit 3264b21

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3 files changed

+36
-52
lines changed

3 files changed

+36
-52
lines changed

‎targets/TARGET_STM/rtc_api.c

Lines changed: 6 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -62,8 +62,8 @@ void rtc_init(void)
6262
return;
6363
}
6464

65-
#if !RTC_LSI /* => LSE */
66-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
65+
#if MBED_CONF_TARGET_LSE_AVAILABLE
66+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_LSE;
6767
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
6868
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
6969
RCC_OscInitStruct.LSIState = RCC_LSI_OFF;
@@ -80,14 +80,13 @@ void rtc_init(void)
8080
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
8181
error("PeriphClkInitStruct RTC failed with LSE\n");
8282
}
83-
84-
#else /* => RTC_LSI */
83+
#else /* MBED_CONF_TARGET_LSE_AVAILABLE */
8584
// Reset Backup domain
8685
__HAL_RCC_BACKUPRESET_FORCE();
8786
__HAL_RCC_BACKUPRESET_RELEASE();
8887

8988
// Enable LSI clock
90-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI;
89+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_LSE;
9190
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
9291
RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
9392
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
@@ -103,7 +102,7 @@ void rtc_init(void)
103102
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
104103
error("PeriphClkInitStruct RTC failed with LSI\n");
105104
}
106-
#endif /* !RTC_LSI */
105+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
107106

108107
// Enable RTC
109108
__HAL_RCC_RTC_ENABLE();
@@ -135,7 +134,7 @@ void rtc_init(void)
135134

136135
void rtc_free(void)
137136
{
138-
#if RTC_LSI
137+
#if !MBED_CONF_TARGET_LSE_AVAILABLE
139138
// Enable Power clock
140139
__HAL_RCC_PWR_CLK_ENABLE();
141140

‎targets/TARGET_STM/rtc_api_hal.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -40,10 +40,10 @@
4040
extern "C" {
4141
#endif
4242

43-
#if RTC_LSI
44-
#define RTC_CLOCK LSI_VALUE
45-
#else
43+
#if MBED_CONF_TARGET_LSE_AVAILABLE
4644
#define RTC_CLOCK LSE_VALUE
45+
#else
46+
#define RTC_CLOCK LSI_VALUE
4747
#endif
4848

4949
/** Read the subsecond register.

‎targets/targets.json

Lines changed: 27 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -706,6 +706,12 @@
706706
"extra_labels": ["STM"],
707707
"supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
708708
"macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
709+
"config": {
710+
"lse_available": {
711+
"help": "Define if a Low Speed External xtal (LSE) is available on the board (0 = No, 1 = Yes). If Yes, the LSE will be used to clock the RTC, LPUART, ... otherwise the Low Speed Internal clock (LSI) will be used",
712+
"value": "1"
713+
}
714+
},
709715
"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"]
710716
},
711717
"LPC54114": {
@@ -772,14 +778,10 @@
772778
"help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
773779
"value": "USE_PLL_HSI",
774780
"macro_name": "CLOCK_SOURCE"
775-
},
776-
"rtc_lsi": {
777-
"help": "Use internal low speed clock (default clock is LSE)",
778-
"value": "1",
779-
"macro_name": "RTC_LSI"
780-
}
781+
}
781782
},
782783
"detect_code": ["0791"],
784+
"overrides": {"lse_available": 0},
783785
"macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
784786
"device_has_add": ["SERIAL_FC"],
785787
"default_lib": "small",
@@ -797,14 +799,10 @@
797799
"help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
798800
"value": "USE_PLL_HSI",
799801
"macro_name": "CLOCK_SOURCE"
800-
},
801-
"rtc_lsi": {
802-
"help": "Use internal low speed clock (default clock is LSE)",
803-
"value": "1",
804-
"macro_name": "RTC_LSI"
805-
}
802+
}
806803
},
807804
"detect_code": ["0785"],
805+
"overrides": {"lse_available": 0},
808806
"macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
809807
"device_has_add": ["CAN", "SERIAL_FC"],
810808
"default_lib": "small",
@@ -939,13 +937,9 @@
939937
"help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
940938
"value": "USE_PLL_HSI",
941939
"macro_name": "CLOCK_SOURCE"
942-
},
943-
"rtc_lsi": {
944-
"help": "Use internal low speed clock (default clock is LSE)",
945-
"value": "1",
946-
"macro_name": "RTC_LSI"
947-
}
940+
}
948941
},
942+
"overrides": {"lse_available": 0},
949943
"detect_code": ["0775"],
950944
"default_lib": "small",
951945
"device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC"],
@@ -1512,7 +1506,7 @@
15121506
"inherits": ["FAMILY_STM32"],
15131507
"core": "Cortex-M4F",
15141508
"extra_labels_add": ["STM32F3", "STM32F303", "STM32F303xC", "STM32F303VC"],
1515-
"macros_add": ["RTC_LSI=1"],
1509+
"overrides": {"lse_available": 0},
15161510
"supported_toolchains": ["GCC_ARM"],
15171511
"device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC"],
15181512
"device_name": "STM32F303VC"
@@ -1526,13 +1520,9 @@
15261520
"help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
15271521
"value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
15281522
"macro_name": "CLOCK_SOURCE"
1529-
},
1530-
"rtc_lsi": {
1531-
"help": "Use internal low speed clock (default clock is LSE)",
1532-
"value": "1",
1533-
"macro_name": "RTC_LSI"
1534-
}
1523+
}
15351524
},
1525+
"overrides": {"lse_available": 0},
15361526
"detect_code": ["0810"],
15371527
"device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC"],
15381528
"default_lib": "small",
@@ -1544,7 +1534,8 @@
15441534
"core": "Cortex-M4F",
15451535
"extra_labels_add": ["STM32F4", "STM32F407", "STM32F407xG", "STM32F407VG"],
15461536
"supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
1547-
"macros_add": ["RTC_LSI=1", "USB_STM_HAL"],
1537+
"macros_add": ["USB_STM_HAL"],
1538+
"overrides": {"lse_available": 0},
15481539
"device_has_add": ["ANALOGOUT"],
15491540
"device_name": "STM32F407VG"
15501541
},
@@ -1562,13 +1553,9 @@
15621553
"help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)",
15631554
"value": "1",
15641555
"macro_name": "CLOCK_SOURCE_USB"
1565-
},
1566-
"rtc_lsi": {
1567-
"help": "Use internal low speed clock (default clock is LSE)",
1568-
"value": "1",
1569-
"macro_name": "RTC_LSI"
1570-
}
1556+
}
15711557
},
1558+
"overrides": {"lse_available": 0},
15721559
"macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
15731560
"device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
15741561
"release_versions": ["2", "5"],
@@ -1602,13 +1589,9 @@
16021589
"help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
16031590
"value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
16041591
"macro_name": "CLOCK_SOURCE"
1605-
},
1606-
"rtc_lsi": {
1607-
"help": "Use internal low speed clock (default clock is LSE)",
1608-
"value": "1",
1609-
"macro_name": "RTC_LSI"
1610-
}
1592+
}
16111593
},
1594+
"overrides": {"lse_available": 0},
16121595
"device_has_add": ["ANALOGOUT", "LOWPOWERTIMER", "SERIAL_FC", "FLASH"],
16131596
"default_lib": "small",
16141597
"release_versions": ["2"],
@@ -1747,7 +1730,8 @@
17471730
"macro_name": "MODEM_ON_BOARD_UART"
17481731
}
17491732
},
1750-
"macros_add": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000", "RTC_LSI=1"],
1733+
"overrides": {"lse_available": 0},
1734+
"macros_add": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000"],
17511735
"post_binary_hook": {
17521736
"function": "MTSCode.combine_bins_mts_dragonfly",
17531737
"toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"]
@@ -1783,7 +1767,7 @@
17831767
"core": "Cortex-M3",
17841768
"default_toolchain": "uARM",
17851769
"extra_labels_add": ["STM32L1", "STM32L152RC"],
1786-
"macros": ["RTC_LSI=1"],
1770+
"overrides": {"lse_available": 0},
17871771
"detect_code": ["4100"],
17881772
"device_has_add": ["ANALOGOUT"],
17891773
"default_lib": "small",
@@ -1867,7 +1851,8 @@
18671851
"macro_name": "MODEM_ON_BOARD_UART"
18681852
}
18691853
},
1870-
"macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "RTC_LSI=1", "HSE_VALUE=12000000", "GNSSBAUD=9600"],
1854+
"macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "HSE_VALUE=12000000", "GNSSBAUD=9600"],
1855+
"overrides": {"lse_available": 0},
18711856
"device_has_add": ["ANALOGOUT", "SERIAL_FC", "TRNG", "FLASH"],
18721857
"features": ["LWIP"],
18731858
"public": false,
@@ -1888,7 +1873,7 @@
18881873
"default_toolchain": "uARM",
18891874
"program_cycle_s": 1.5,
18901875
"extra_labels_add": ["STM32L1", "STM32L151RC"],
1891-
"macros": ["RTC_LSI=1"],
1876+
"overrides": {"lse_available": 0},
18921877
"supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
18931878
"device_has_add": ["ANALOGOUT"],
18941879
"default_lib": "small",

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