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Define CMSIS_VECTAB_VIRTUAL for M0 targets
Define CMSIS_VECTAB_VIRTUAL for the M0 targets which have a corresponding driver. The only M0 target missing this is the LPC4330_M0 which is not part of the 2 or 5 release.
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‎targets/targets.json

Lines changed: 25 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -56,6 +56,7 @@
5656
"inherits": ["LPCTarget"],
5757
"core": "Cortex-M0",
5858
"extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11CXX"],
59+
"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
5960
"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
6061
"device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
6162
"device_name": "LPC11C24FBD48/301"
@@ -65,6 +66,7 @@
6566
"core": "Cortex-M0",
6667
"default_toolchain": "uARM",
6768
"extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11XX"],
69+
"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
6870
"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
6971
"device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
7072
"default_lib": "small",
@@ -76,6 +78,7 @@
7678
"core": "Cortex-M0",
7779
"default_toolchain": "uARM",
7880
"extra_labels": ["NXP", "LPC11UXX", "LPC11U24_401"],
81+
"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
7982
"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
8083
"detect_code": ["1040"],
8184
"device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
@@ -94,6 +97,7 @@
9497
"inherits": ["LPCTarget"],
9598
"core": "Cortex-M0",
9699
"extra_labels": ["NXP", "LPC11UXX"],
100+
"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
97101
"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
98102
"device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
99103
"device_name": "LPC11U24FHI33/301"
@@ -103,6 +107,7 @@
103107
"core": "Cortex-M0",
104108
"default_toolchain": "uARM",
105109
"extra_labels": ["NXP", "LPC11UXX"],
110+
"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
106111
"supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
107112
"device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
108113
"default_lib": "small",
@@ -120,6 +125,7 @@
120125
"core": "Cortex-M0",
121126
"default_toolchain": "uARM",
122127
"extra_labels": ["NXP", "LPC11UXX"],
128+
"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
123129
"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
124130
"device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
125131
"default_lib": "small",
@@ -131,6 +137,7 @@
131137
"core": "Cortex-M0",
132138
"default_toolchain": "uARM",
133139
"extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
140+
"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
134141
"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
135142
"device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
136143
"default_lib": "small",
@@ -142,6 +149,7 @@
142149
"core": "Cortex-M0",
143150
"default_toolchain": "uARM",
144151
"extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
152+
"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
145153
"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
146154
"device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
147155
"default_lib": "small",
@@ -155,6 +163,7 @@
155163
"core": "Cortex-M0",
156164
"default_toolchain": "uARM",
157165
"extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
166+
"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
158167
"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
159168
"device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
160169
"default_lib": "small",
@@ -165,6 +174,7 @@
165174
"core": "Cortex-M0",
166175
"default_toolchain": "uARM",
167176
"extra_labels": ["NXP", "LPC11UXX"],
177+
"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
168178
"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
169179
"default_lib": "small",
170180
"device_name": "LPC11U37FBD64/501"
@@ -179,6 +189,7 @@
179189
"core": "Cortex-M0",
180190
"default_toolchain": "uARM",
181191
"extra_labels": ["NXP", "LPC11UXX", "LPC11U37_501"],
192+
"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
182193
"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
183194
"inherits": ["LPCTarget"],
184195
"device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
@@ -384,6 +395,7 @@
384395
"core": "Cortex-M0",
385396
"default_toolchain": "uARM",
386397
"extra_labels": ["NXP", "LPC11UXX"],
398+
"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
387399
"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR"],
388400
"inherits": ["LPCTarget"],
389401
"device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
@@ -664,7 +676,7 @@
664676
"supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
665677
"inherits": ["Target"],
666678
"detect_code": ["0725"],
667-
"macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
679+
"macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
668680
"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
669681
"default_lib": "small",
670682
"release_versions": ["2"],
@@ -678,7 +690,7 @@
678690
"supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
679691
"inherits": ["Target"],
680692
"detect_code": ["0791"],
681-
"macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
693+
"macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
682694
"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
683695
"default_lib": "small",
684696
"release_versions": ["2"],
@@ -692,7 +704,7 @@
692704
"supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
693705
"inherits": ["Target"],
694706
"detect_code": ["0785"],
695-
"macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2"],
707+
"macros": ["RTC_LSI=1", "TRANSACTION_QUEUE_SIZE_SPI=2", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
696708
"device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
697709
"default_lib": "small",
698710
"release_versions": ["2"],
@@ -706,7 +718,7 @@
706718
"supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
707719
"inherits": ["Target"],
708720
"detect_code": ["0755"],
709-
"macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
721+
"macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
710722
"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
711723
"release_versions": ["2", "5"],
712724
"device_name": "STM32F070RB"
@@ -719,7 +731,7 @@
719731
"supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
720732
"inherits": ["Target"],
721733
"detect_code": ["0730"],
722-
"macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
734+
"macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
723735
"device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
724736
"release_versions": ["2", "5"],
725737
"device_name": "STM32F072RB"
@@ -732,7 +744,7 @@
732744
"supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
733745
"inherits": ["Target"],
734746
"detect_code": ["0750"],
735-
"macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
747+
"macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
736748
"device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
737749
"release_versions": ["2", "5"],
738750
"device_name": "STM32F091RC"
@@ -1186,7 +1198,7 @@
11861198
"default_toolchain": "ARM",
11871199
"extra_labels": ["STM", "STM32F0", "STM32F051", "STM32F051R8"],
11881200
"supported_toolchains": ["GCC_ARM"],
1189-
"macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
1201+
"macros": ["TRANSACTION_QUEUE_SIZE_SPI=2", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
11901202
"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
11911203
"device_name": "STM32F051R8"
11921204
},
@@ -1458,7 +1470,7 @@
14581470
"inherits": ["Target"],
14591471
"core": "Cortex-M0",
14601472
"OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
1461-
"macros": ["NRF51", "TARGET_NRF51822"],
1473+
"macros": ["NRF51", "TARGET_NRF51822", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
14621474
"MERGE_BOOTLOADER": false,
14631475
"extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822"],
14641476
"OUTPUT_EXT": "hex",
@@ -1870,7 +1882,7 @@
18701882
"core": "Cortex-M0",
18711883
"supported_toolchains": ["ARM"],
18721884
"extra_labels": ["ARM_SSG", "MPS2", "MPS2_M0"],
1873-
"macros": ["CMSDK_CM0"],
1885+
"macros": ["CMSDK_CM0", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
18741886
"device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
18751887
"release_versions": ["2"]
18761888
},
@@ -2545,6 +2557,7 @@
25452557
"supported_form_factors": ["ARDUINO"],
25462558
"core": "Cortex-M0",
25472559
"extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500"],
2560+
"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
25482561
"supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
25492562
"inherits": ["Target"],
25502563
"device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
@@ -2554,6 +2567,7 @@
25542567
"supported_form_factors": ["ARDUINO"],
25552568
"core": "Cortex-M0",
25562569
"extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500P"],
2570+
"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
25572571
"supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
25582572
"inherits": ["Target"],
25592573
"device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
@@ -2563,6 +2577,7 @@
25632577
"inherits": ["Target"],
25642578
"core": "Cortex-M0",
25652579
"extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"],
2580+
"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
25662581
"supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
25672582
"device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
25682583
"release_versions": ["2", "5"]
@@ -2886,7 +2901,7 @@
28862901
"default_toolchain": "GCC_ARM",
28872902
"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
28882903
"extra_labels": ["ublox"],
2889-
"macros": ["TARGET_PROCESSOR_FAMILY_BOUDICA", "BOUDICA_SARA", "NDEBUG=1"],
2904+
"macros": ["TARGET_PROCESSOR_FAMILY_BOUDICA", "BOUDICA_SARA", "NDEBUG=1", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
28902905
"public": false,
28912906
"target_overrides": {
28922907
"*": {

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