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| 1 | +/** |
| 2 | + * @file fcr_regs.h |
| 3 | + * @brief Registers, Bit Masks and Bit Positions for the FCR Peripheral Module. |
| 4 | + */ |
| 5 | + |
| 6 | +/* **************************************************************************** |
| 7 | + * Copyright (C) Maxim Integrated Products, Inc., All Rights Reserved. |
| 8 | + * |
| 9 | + * Permission is hereby granted, free of charge, to any person obtaining a |
| 10 | + * copy of this software and associated documentation files (the "Software"), |
| 11 | + * to deal in the Software without restriction, including without limitation |
| 12 | + * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 13 | + * and/or sell copies of the Software, and to permit persons to whom the |
| 14 | + * Software is furnished to do so, subject to the following conditions: |
| 15 | + * |
| 16 | + * The above copyright notice and this permission notice shall be included |
| 17 | + * in all copies or substantial portions of the Software. |
| 18 | + * |
| 19 | + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| 20 | + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 21 | + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
| 22 | + * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
| 23 | + * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 24 | + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 25 | + * OTHER DEALINGS IN THE SOFTWARE. |
| 26 | + * |
| 27 | + * Except as contained in this notice, the name of Maxim Integrated |
| 28 | + * Products, Inc. shall not be used except as stated in the Maxim Integrated |
| 29 | + * Products, Inc. Branding Policy. |
| 30 | + * |
| 31 | + * The mere transfer of this software does not imply any licenses |
| 32 | + * of trade secrets, proprietary technology, copyrights, patents, |
| 33 | + * trademarks, maskwork rights, or any other form of intellectual |
| 34 | + * property whatsoever. Maxim Integrated Products, Inc. retains all |
| 35 | + * ownership rights. |
| 36 | + * |
| 37 | + * |
| 38 | + *************************************************************************** */ |
| 39 | + |
| 40 | +#ifndef _FCR_REGS_H_ |
| 41 | +#define _FCR_REGS_H_ |
| 42 | + |
| 43 | +/* **** Includes **** */ |
| 44 | +#include <stdint.h> |
| 45 | + |
| 46 | +#ifdef __cplusplus |
| 47 | +extern "C" { |
| 48 | +#endif |
| 49 | + |
| 50 | +#if defined (__ICCARM__) |
| 51 | + #pragma system_include |
| 52 | +#endif |
| 53 | + |
| 54 | +#if defined (__CC_ARM) |
| 55 | + #pragma anon_unions |
| 56 | +#endif |
| 57 | +/// @cond |
| 58 | +/* |
| 59 | + If types are not defined elsewhere (CMSIS) define them here |
| 60 | +*/ |
| 61 | +#ifndef __IO |
| 62 | +#define __IO volatile |
| 63 | +#endif |
| 64 | +#ifndef __I |
| 65 | +#define __I volatile const |
| 66 | +#endif |
| 67 | +#ifndef __O |
| 68 | +#define __O volatile |
| 69 | +#endif |
| 70 | + |
| 71 | +/// @endcond |
| 72 | + |
| 73 | +/* **** Definitions **** */ |
| 74 | + |
| 75 | +/** |
| 76 | + * @ingroup fcr |
| 77 | + * @defgroup fcr_registers FCR_Registers |
| 78 | + * @brief Registers, Bit Masks and Bit Positions for the FCR Peripheral Module. |
| 79 | + * @details Function Control. |
| 80 | + */ |
| 81 | + |
| 82 | +/** |
| 83 | + * @ingroup fcr_registers |
| 84 | + * Structure type to access the FCR Registers. |
| 85 | + */ |
| 86 | +typedef struct { |
| 87 | + __IO uint32_t reg0; /**< <tt>\b 0x00:</tt> FCR REG0 Register */ |
| 88 | +} mxc_fcr_regs_t; |
| 89 | + |
| 90 | +/* Register offsets for module FCR */ |
| 91 | +/** |
| 92 | + * @ingroup fcr_registers |
| 93 | + * @defgroup FCR_Register_Offsets Register Offsets |
| 94 | + * @brief FCR Peripheral Register Offsets from the FCR Base Peripheral Address. |
| 95 | + * @{ |
| 96 | + */ |
| 97 | + #define MXC_R_FCR_REG0 ((uint32_t)0x00000000UL) /**< Offset from FCR Base Address: <tt> 0x0000</tt> */ |
| 98 | +/**@} end of group fcr_registers */ |
| 99 | + |
| 100 | +/** |
| 101 | + * @ingroup fcr_registers |
| 102 | + * @defgroup FCR_REG0 FCR_REG0 |
| 103 | + * @brief Register 0. |
| 104 | + * @{ |
| 105 | + */ |
| 106 | + #define MXC_F_FCR_REG0_I2C0_SDA_FILTER_EN_POS 20 /**< REG0_I2C0_SDA_FILTER_EN Position */ |
| 107 | + #define MXC_F_FCR_REG0_I2C0_SDA_FILTER_EN ((uint32_t)(0x1UL << MXC_F_FCR_REG0_I2C0_SDA_FILTER_EN_POS)) /**< REG0_I2C0_SDA_FILTER_EN Mask */ |
| 108 | + |
| 109 | + #define MXC_F_FCR_REG0_I2C0_SCL_FILTER_EN_POS 21 /**< REG0_I2C0_SCL_FILTER_EN Position */ |
| 110 | + #define MXC_F_FCR_REG0_I2C0_SCL_FILTER_EN ((uint32_t)(0x1UL << MXC_F_FCR_REG0_I2C0_SCL_FILTER_EN_POS)) /**< REG0_I2C0_SCL_FILTER_EN Mask */ |
| 111 | + |
| 112 | + #define MXC_F_FCR_REG0_I2C1_SDA_FILTER_EN_POS 22 /**< REG0_I2C1_SDA_FILTER_EN Position */ |
| 113 | + #define MXC_F_FCR_REG0_I2C1_SDA_FILTER_EN ((uint32_t)(0x1UL << MXC_F_FCR_REG0_I2C1_SDA_FILTER_EN_POS)) /**< REG0_I2C1_SDA_FILTER_EN Mask */ |
| 114 | + |
| 115 | + #define MXC_F_FCR_REG0_I2C1_SCL_FILTER_EN_POS 23 /**< REG0_I2C1_SCL_FILTER_EN Position */ |
| 116 | + #define MXC_F_FCR_REG0_I2C1_SCL_FILTER_EN ((uint32_t)(0x1UL << MXC_F_FCR_REG0_I2C1_SCL_FILTER_EN_POS)) /**< REG0_I2C1_SCL_FILTER_EN Mask */ |
| 117 | + |
| 118 | +/**@} end of group FCR_REG0_Register */ |
| 119 | + |
| 120 | +#ifdef __cplusplus |
| 121 | +} |
| 122 | +#endif |
| 123 | + |
| 124 | +#endif /* _FCR_REGS_H_ */ |
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