Use boot stack size from config system

To allow overriding of the boot stack size from the Mbed configuration
system, consistently use MBED_CONF_TARGET_BOOT_STACK_SIZE rather than
MBED_BOOT_STACK_SIZE.

Fixes #10319

Author: Patater

docs/design-documents/platform/memory-model/ram_memory_model.md

@@ -90,16 +90,16 @@ Phase 2:
 Note: Heap split support across multiple RAM banks, can also be achieved post this change. 
 
 # Detailed Design
-1. Update tools to set define `MBED_BOOT_STACK_SIZE` from target config option `target.boot-stack-size`
-1. Linker Scripts - Update linker scripts for ARM, IAR and GCC toolchain to use MBED_BOOT_STACK_SIZE define for standardizing size of ISR stack.
+1. Update tools to set define `MBED_CONF_TARGET_BOOT_STACK_SIZE` from target config option `target.boot-stack-size`
+1. Linker Scripts - Update linker scripts for ARM, IAR and GCC toolchain to use MBED_CONF_TARGET_BOOT_STACK_SIZE define for standardizing size of ISR stack.
 1. Update __user_setup_stackheap() implementation to adopt 2-region RAM memory model.
 __user_setup_stackheap() works with systems where the application starts with a value of sp (r13) that is already correct. To make use of sp(stack base), implement __user_setup_stackheap() to set up r0 (heap base), r2 (heap limit), and r3 (stack limit) (for a two-region model) and return.
 Reference http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.kui0099a/armlib_cjagaaha.htm http://www.keil.com/support/man/docs/armlib/armlib_chr1359122863069.htm
 1. Modify _sbrk() implementation for GCC to use 2-region memory model
 
 # Tools and configuration changes
 
-1. Target config option "target.boot-stack-size" which is passed to the linker as the define "MBED_BOOT_STACK_SIZE" so the linker can adjust the stack accordingly.
+1. Target config option "target.boot-stack-size" which is passed to the linker as the define "MBED_CONF_TARGET_BOOT_STACK_SIZE" so the linker can adjust the stack accordingly.
    Boot stack size - the size of ISR and main stack will be 4K as default in targets.json for bare metal (non-RTOS) builds. 
    Boot stack size - the size of ISR stack will be over-written as 1K in `rtos/mbed_lib.json` for RTOS builds.
 

hal/tests/TESTS/mbed_hal/stack_size_unification/main.cpp

@@ -37,7 +37,7 @@ extern uint32_t mbed_stack_isr_size;
 
 #define EXPECTED_USER_THREAD_DEFAULT_STACK_SIZE  (MBED_CONF_RTOS_THREAD_STACK_SIZE)
 
-#if ((MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE) <= (EXPECTED_MAIN_THREAD_STACK_SIZE + EXPECTED_ISR_STACK_SIZE))
+#if ((MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE) <= (EXPECTED_MAIN_THREAD_STACK_SIZE + EXPECTED_ISR_STACK_SIZE))
 #error [NOT_SUPPORTED] Insufficient stack for staci_size_unification tests
 #endif
 

storage/blockdevice/tests/TESTS/blockdevice/heap_block_device/main.cpp

@@ -28,7 +28,7 @@ using namespace utest::v1;
 #define TEST_BLOCK_COUNT 10
 #define TEST_ERROR_MASK 16
 
-#if ((MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE) <= TEST_BLOCK_DEVICE_SIZE)
+#if ((MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE) <= TEST_BLOCK_DEVICE_SIZE)
 #error [NOT_SUPPORTED] Insufficient heap for heap block device tests
 #endif
 

storage/blockdevice/tests/TESTS/blockdevice/mbr_block_device/main.cpp

@@ -27,7 +27,7 @@ using namespace utest::v1;
 #define BLOCK_COUNT 16
 #define BLOCK_SIZE 512
 
-#if ((MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE) <= (BLOCK_COUNT * BLOCK_SIZE))
+#if ((MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE) <= (BLOCK_COUNT * BLOCK_SIZE))
 #error [NOT_SUPPORTED] Insufficient heap for mbr block device tests
 #endif
 

storage/blockdevice/tests/TESTS/blockdevice/util_block_device/main.cpp

@@ -29,7 +29,7 @@ using namespace utest::v1;
 #define BLOCK_COUNT 16
 #define BLOCK_SIZE 512
 
-#if ((MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE) <= (BLOCK_COUNT * BLOCK_SIZE))
+#if ((MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE) <= (BLOCK_COUNT * BLOCK_SIZE))
 #error [NOT_SUPPORTED] Insufficient heap for util block device tests
 #endif
 

targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct

@@ -38,14 +38,14 @@
 #include "../memory_zones.h"
 #include "../cmsis_nvic.h"
 
-#if !defined(MBED_BOOT_STACK_SIZE)
-  #define MBED_BOOT_STACK_SIZE 0x400
+#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
+  #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
 #endif
 
 #if (defined(__stack_size__))
     #define STACK_SIZE  __stack_size__
 #else  
-    #define STACK_SIZE  MBED_BOOT_STACK_SIZE
+    #define STACK_SIZE  MBED_CONF_TARGET_BOOT_STACK_SIZE
 #endif
 
 ; The vector table is loaded at address 0x00000000 in Flash memory region.

targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_GCC_ARM/MPS2.ld

@@ -31,8 +31,8 @@
 #include "../memory_zones.h"
 #include "../cmsis_nvic.h"
 
-#if !defined(MBED_BOOT_STACK_SIZE)
-    #define MBED_BOOT_STACK_SIZE 0x400
+#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
+    #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
 #endif
 
 MEMORY
@@ -69,7 +69,7 @@ MEMORY
  */
 ENTRY(Reset_Handler)
 
-STACK_SIZE = MBED_BOOT_STACK_SIZE;
+STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
 
 /* Size of the vector table in SRAM */
 M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE;

targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_IAR/MPS2.icf

@@ -46,11 +46,11 @@ define symbol __ICFEDIT_region_RAM_end__      = ZBT_SRAM2_START + ZBT_SRAM2_SIZE
 
 /*-Sizes-*/
 /* Heap and Stack size */
-if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
-    define symbol MBED_BOOT_STACK_SIZE = 0x400;
+if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
+    define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
 }
 define symbol __ICFEDIT_size_heap__   = 0x200000;
-define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
+define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
 /**** End of ICF editor section. ###ICF###*/
 
 define memory mem with size = 4G;

targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct

@@ -38,14 +38,14 @@
 #include "../memory_zones.h"
 #include "../cmsis_nvic.h"
 
-#if !defined(MBED_BOOT_STACK_SIZE)
-  #define MBED_BOOT_STACK_SIZE 0x400
+#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
+  #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
 #endif
 
 #if (defined(__stack_size__))
     #define STACK_SIZE  __stack_size__
 #else  
-    #define STACK_SIZE  MBED_BOOT_STACK_SIZE
+    #define STACK_SIZE  MBED_CONF_TARGET_BOOT_STACK_SIZE
 #endif
 
 ; The vector table is loaded at address 0x00000000 in Flash memory region.

targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_GCC_ARM/MPS2.ld

@@ -31,8 +31,8 @@
 #include "../memory_zones.h"
 #include "../cmsis_nvic.h"
 
-#if !defined(MBED_BOOT_STACK_SIZE)
-    #define MBED_BOOT_STACK_SIZE 0x400
+#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
+    #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
 #endif
 
 MEMORY
@@ -69,7 +69,7 @@ MEMORY
  */
 ENTRY(Reset_Handler)
 
-STACK_SIZE = MBED_BOOT_STACK_SIZE;
+STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
 
 /* Size of the vector table in SRAM */
 M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE;