53
53
54
54
//*** ADC ***
55
55
56
- // Tauno: OK - Checked
57
- // Tauno: WARNING below configs are for LQFP32 G431KB Chip (which is used NUCLEO_G431KB board)
58
- // Tauno: PC_4,5 connected to ADC in QFN48+ Configs (NUCLEO_G431KB has a LQFP32)
59
- // Tauno: PB_1,2,11,12,13,14,15 connected to ADC in QFN48+ Configs
60
56
MBED_WEAK const PinMap PinMap_ADC [] = {
61
57
{PA_0 , ADC_1 , STM_PIN_DATA_EXT (STM_MODE_ANALOG , GPIO_NOPULL , 0 , 1 , 0 )}, // ADC1_IN1
62
58
{PA_0_ALT0 , ADC_2 , STM_PIN_DATA_EXT (STM_MODE_ANALOG , GPIO_NOPULL , 0 , 1 , 0 )}, // ADC2_IN1
@@ -74,18 +70,15 @@ MBED_WEAK const PinMap PinMap_ADC[] = {
74
70
{NC , NC , 0 }
75
71
};
76
72
77
- // !!! SECTION TO BE CHECKED WITH DEVICE REFERENCE MANUAL
78
- // Tauno: WARNING - I haven't verified this. Assuming it's correct.
79
73
MBED_WEAK const PinMap PinMap_ADC_Internal [] = {
80
- {ADC_TEMP , ADC_1 , STM_PIN_DATA_EXT (STM_MODE_ANALOG , GPIO_NOPULL , 0 , 16 , 0 )},
81
- {ADC_VREF , ADC_1 , STM_PIN_DATA_EXT (STM_MODE_ANALOG , GPIO_NOPULL , 0 , 17 , 0 )},
82
- {ADC_VBAT , ADC_1 , STM_PIN_DATA_EXT (STM_MODE_ANALOG , GPIO_NOPULL , 0 , 18 , 0 )},
74
+ {ADC_TEMP , ADC_1 , STM_PIN_DATA_EXT (STM_MODE_ANALOG , GPIO_NOPULL , 0 , 16 , 0 )}, // ADC1_IN16
75
+ {ADC_VREF , ADC_1 , STM_PIN_DATA_EXT (STM_MODE_ANALOG , GPIO_NOPULL , 0 , 18 , 0 )}, // ADC1_IN18
76
+ {ADC_VBAT , ADC_1 , STM_PIN_DATA_EXT (STM_MODE_ANALOG , GPIO_NOPULL , 0 , 17 , 0 )}, // ADC1_IN17
83
77
{NC , NC , 0 }
84
78
};
85
79
86
80
//*** DAC ***
87
81
88
- // Tauno: OK - Checked
89
82
MBED_WEAK const PinMap PinMap_DAC [] = {
90
83
{PA_4 , DAC_1 , STM_PIN_DATA_EXT (STM_MODE_ANALOG , GPIO_NOPULL , 0 , 1 , 0 )}, // DAC1_OUT1
91
84
{PA_5 , DAC_1 , STM_PIN_DATA_EXT (STM_MODE_ANALOG , GPIO_NOPULL , 0 , 2 , 0 )}, // DAC1_OUT2
@@ -94,9 +87,6 @@ MBED_WEAK const PinMap PinMap_DAC[] = {
94
87
95
88
//*** I2C ***
96
89
97
- // PF2, PC4, PB2, PB12, PC8, PC9, PC11, PB9 => I2C (Only QFP48+)
98
- // PA10 (I2C2_SMBA) => Appears to be missing below (even though on LQFP32 pin 20) => Let's ignore I2C2_SMBA
99
-
100
90
MBED_WEAK const PinMap PinMap_I2C_SDA [] = {
101
91
{PA_8 , I2C_2 , STM_PIN_DATA (STM_MODE_AF_OD , GPIO_NOPULL , GPIO_AF4_I2C2 )},
102
92
{PA_14 , I2C_1 , STM_PIN_DATA (STM_MODE_AF_OD , GPIO_NOPULL , GPIO_AF4_I2C1 )}, // Connected to T_SWCLK
@@ -117,9 +107,6 @@ MBED_WEAK const PinMap PinMap_I2C_SCL[] = {
117
107
118
108
//*** PWM ***
119
109
120
- // Tauno: WARNING - A lot. I'm just going to assume it's OK.
121
-
122
- // TIM5 cannot be used because already used by the us_ticker
123
110
MBED_WEAK const PinMap PinMap_PWM [] = {
124
111
{PA_0 , PWM_2 , STM_PIN_DATA_EXT (STM_MODE_AF_PP , GPIO_PULLUP , GPIO_AF1_TIM2 , 1 , 0 )}, // TIM2_CH1
125
112
{PA_1 , PWM_2 , STM_PIN_DATA_EXT (STM_MODE_AF_PP , GPIO_PULLUP , GPIO_AF1_TIM2 , 2 , 0 )}, // TIM2_CH2
@@ -178,25 +165,19 @@ MBED_WEAK const PinMap PinMap_PWM[] = {
178
165
179
166
//*** SERIAL ***
180
167
181
- // Tauno: Only in QFN48+: PC0, PC1, PB10, PB11, PB12, PB13
182
- // Tauno NOTE: I think the comment for PA2 and PA3 is wrong (mixed). RX should be TX. The C-code appears correct.
183
- // Tauno: PB1 => LPUART1_RTS_DE (Pin only exists in QFN48+)
184
- // Other than that:
185
-
186
-
187
168
MBED_WEAK const PinMap PinMap_UART_TX [] = {
188
- {PA_2 , UART_2 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_PULLUP , GPIO_AF7_USART2 )}, // Connected to STDIO_UART_RX
189
- {PA_2_ALT0 , LPUART_1 ,STM_PIN_DATA (STM_MODE_AF_PP , GPIO_PULLUP , GPIO_AF12_LPUART1 )}, // Connected to STDIO_UART_RX
169
+ {PA_2 , UART_2 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_PULLUP , GPIO_AF7_USART2 )}, // Connected to STDIO_UART_TX
170
+ {PA_2_ALT0 , LPUART_1 ,STM_PIN_DATA (STM_MODE_AF_PP , GPIO_PULLUP , GPIO_AF12_LPUART1 )}, // Connected to STDIO_UART_TX
190
171
{PA_9 , UART_1 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_PULLUP , GPIO_AF7_USART1 )},
191
- {PA_14 , UART_2 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_PULLUP , GPIO_AF7_USART2 )}, // Connected to T_SWCLK
192
- {PB_3 , UART_2 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_PULLUP , GPIO_AF7_USART2 )}, // Connected to T_SWO
172
+ {PA_14 , UART_2 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_PULLUP , GPIO_AF7_USART2 )}, // Connected to T_SWCLK
173
+ {PB_3 , UART_2 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_PULLUP , GPIO_AF7_USART2 )}, // Connected to T_SWO
193
174
{PB_6 , UART_1 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_PULLUP , GPIO_AF7_USART1 )},
194
175
{NC , NC , 0 }
195
176
};
196
177
197
178
MBED_WEAK const PinMap PinMap_UART_RX [] = {
198
- {PA_3 , UART_2 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_PULLUP , GPIO_AF7_USART2 )}, // Connected to STDIO_UART_TX
199
- {PA_3_ALT0 , LPUART_1 ,STM_PIN_DATA (STM_MODE_AF_PP , GPIO_PULLUP , GPIO_AF12_LPUART1 )}, // Connected to STDIO_UART_TX
179
+ {PA_3 , UART_2 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_PULLUP , GPIO_AF7_USART2 )}, // Connected to STDIO_UART_RX
180
+ {PA_3_ALT0 , LPUART_1 ,STM_PIN_DATA (STM_MODE_AF_PP , GPIO_PULLUP , GPIO_AF12_LPUART1 )}, // Connected to STDIO_UART_RX
200
181
{PA_10 , UART_1 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_PULLUP , GPIO_AF7_USART1 )},
201
182
{PA_15 , UART_2 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_PULLUP , GPIO_AF7_USART2 )},
202
183
{PB_4 , UART_2 , STM_PIN_DATA (STM_MODE_AF_PP , GPIO_PULLUP , GPIO_AF7_USART2 )},
0 commit comments