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romanjoeromanjoe
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Update linker scripts with templates from psoc6pdl 1.6.0.4172 for IAR and ARM for 064B0S2, add cm4_dual versions
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-92
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5 files changed

+367
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‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cyb06xxa_cm0plus.sct

Lines changed: 65 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44

55
;*******************************************************************************
66
;* \file cyb06xxa_cm0plus.sct
7-
;* \version 2.70.1
7+
;* \version 2.80
88
;*
99
;* Linker file for the ARMCC.
1010
;*
@@ -42,6 +42,53 @@
4242
;* limitations under the License.
4343
;******************************************************************************/
4444

45+
#if !defined(MBED_ROM_START)
46+
#define MBED_ROM_START 0x10000000
47+
#endif
48+
49+
;* MBED_APP_START is being used by the bootloader build script and
50+
;* will be calculate by the system. Without bootloader the MBED_APP_START
51+
;* is equal to MBED_ROM_START
52+
;*
53+
#if !defined(MBED_APP_START)
54+
#define MBED_APP_START MBED_ROM_START
55+
#endif
56+
57+
#if !defined(MBED_ROM_SIZE)
58+
#define MBED_ROM_SIZE 0x00010000
59+
#endif
60+
61+
;* MBED_APP_SIZE is being used by the bootloader build script and
62+
;* will be calculate by the system. Without bootloader the MBED_APP_SIZE
63+
;* is equal to MBED_ROM_SIZE
64+
;*
65+
#if !defined(MBED_APP_SIZE)
66+
#define MBED_APP_SIZE MBED_ROM_SIZE
67+
#endif
68+
69+
#if !defined(MBED_RAM_START)
70+
#define MBED_RAM_START 0x080E0000
71+
#endif
72+
73+
#if !defined(MBED_RAM_SIZE)
74+
#define MBED_RAM_SIZE 0x0000C000
75+
#endif
76+
77+
#if !defined(MBED_PUBLIC_RAM_SIZE)
78+
#define MBED_PUBLIC_RAM_SIZE 0x200
79+
#endif
80+
81+
; The size of the stack section at the end of CM0+ SRAM
82+
#if !defined(MBED_BOOT_STACK_SIZE)
83+
#define MBED_BOOT_STACK_SIZE 0x400
84+
#endif
85+
86+
#define STACK_SIZE MBED_BOOT_STACK_SIZE
87+
88+
#if !defined(MBED_PUBLIC_RAM_START)
89+
#define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE)
90+
#endif
91+
4592
; The defines below describe the location and size of blocks of memory in the target.
4693
; Use these defines to specify the memory regions available for allocation.
4794

@@ -50,14 +97,14 @@
5097
; Your changes must be aligned with the corresponding defines for the CM4 core in 'xx_cm4_dual.scat',
5198
; where 'xx' is the device group; for example, 'cyb06xx7_cm4_dual.scat'.
5299
; RAM
53-
#define RAM_START 0x08000000
54-
#define RAM_SIZE 0x00040000
100+
#define RAM_START MBED_RAM_START
101+
#define RAM_SIZE MBED_RAM_SIZE
102+
; Public RAM
103+
#define PUBLIC_RAM_START MBED_PUBLIC_RAM_START
104+
#define PUBLIC_RAM_SIZE MBED_PUBLIC_RAM_SIZE
55105
; Flash
56-
#define FLASH_START 0x10000000
57-
#define FLASH_SIZE 0x00040000
58-
59-
; The size of the stack section at the end of CM0+ SRAM
60-
#define STACK_SIZE 0x00001000
106+
#define FLASH_START MBED_APP_START
107+
#define FLASH_SIZE MBED_APP_SIZE
61108

62109
; The size of the MCU boot header area at the start of FLASH
63110
#define BOOT_HEADER_SIZE 0x00000400
@@ -101,14 +148,9 @@
101148

102149

103150
; Cortex-M0+ application flash area
104-
LR_IROM1 FLASH_START FLASH_SIZE
151+
LR_IROM1 (FLASH_START + BOOT_HEADER_SIZE) (FLASH_SIZE - BOOT_HEADER_SIZE - 0x8000)
105152
{
106-
.cy_app_header +0
107-
{
108-
* (.cy_app_header)
109-
}
110-
111-
ER_FLASH_VECTORS FLASH_START + BOOT_HEADER_SIZE
153+
ER_FLASH_VECTORS +0
112154
{
113155
* (RESET, +FIRST)
114156
}
@@ -137,13 +179,18 @@ LR_IROM1 FLASH_START FLASH_SIZE
137179
* (.noinit)
138180
}
139181

182+
RW_IRAM2 PUBLIC_RAM_START UNINIT
183+
{
184+
* (.cy_sharedmem)
185+
}
186+
140187
; Application heap area (HEAP)
141-
ARM_LIB_HEAP +0 EMPTY ((RAM_START+RAM_SIZE)-AlignExpr(ImageLimit(RW_IRAM1), 8)-STACK_SIZE)
142-
{
188+
ARM_LIB_HEAP +0 EMPTY RAM_START+RAM_SIZE-STACK_SIZE-ImageLimit(RW_IRAM2)
189+
{
143190
}
144191

145192
; Stack region growing down
146-
ARM_LIB_STACK (RAM_START+RAM_SIZE) EMPTY -STACK_SIZE
193+
ARM_LIB_STACK RAM_START+RAM_SIZE EMPTY -STACK_SIZE
147194
{
148195
}
149196
}

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cyb06xxa_cm0plus.ld

Lines changed: 57 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/***************************************************************************//**
22
* \file cyb06xxa_cm0plus.ld
3-
* \version 2.70.1
3+
* \version 2.80
44
*
55
* Linker file for the GNU C compiler.
66
*
@@ -40,8 +40,52 @@ SEARCH_DIR(.)
4040
GROUP(-lgcc -lc -lnosys)
4141
ENTRY(Reset_Handler)
4242

43+
#if !defined(MBED_ROM_START)
44+
#define MBED_ROM_START 0x10000000
45+
#endif
46+
47+
/* MBED_APP_START is being used by the bootloader build script and
48+
* will be calculate by the system. Without bootloader the MBED_APP_START
49+
* is equal to MBED_ROM_START
50+
*/
51+
#if !defined(MBED_APP_START)
52+
#define MBED_APP_START MBED_ROM_START
53+
#endif
54+
55+
#if !defined(MBED_ROM_SIZE)
56+
#define MBED_ROM_SIZE 0x00010000
57+
#endif
58+
59+
/* MBED_APP_SIZE is being used by the bootloader build script and
60+
* will be calculate by the system. Without bootloader the MBED_APP_SIZE
61+
* is equal to MBED_ROM_SIZE
62+
*/
63+
#if !defined(MBED_APP_SIZE)
64+
#define MBED_APP_SIZE MBED_ROM_SIZE
65+
#endif
66+
67+
#if !defined(MBED_RAM_START)
68+
#define MBED_RAM_START 0x080E0000
69+
#endif
70+
71+
#if !defined(MBED_RAM_SIZE)
72+
#define MBED_RAM_SIZE 0x0000C000
73+
#endif
74+
75+
#if !defined(MBED_PUBLIC_RAM_SIZE)
76+
#define MBED_PUBLIC_RAM_SIZE 0x200
77+
#endif
78+
4379
/* The size of the stack section at the end of CM0+ SRAM */
44-
STACK_SIZE = 0x1000;
80+
#if !defined(MBED_BOOT_STACK_SIZE)
81+
#define MBED_BOOT_STACK_SIZE 0x400
82+
#endif
83+
84+
STACK_SIZE = MBED_BOOT_STACK_SIZE;
85+
86+
#if !defined(MBED_PUBLIC_RAM_START)
87+
#define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE)
88+
#endif
4589

4690
/* The size of the MCU boot header area at the start of FLASH */
4791
BOOT_HEADER_SIZE = 0x400;
@@ -64,8 +108,9 @@ MEMORY
64108
* Your changes must be aligned with the corresponding memory regions for the CM4 core in 'xx_cm4_dual.ld',
65109
* where 'xx' is the device group; for example, 'cyb06xx7_cm4_dual.ld'.
66110
*/
67-
ram (rwx) : ORIGIN = 0x08000000, LENGTH = 0x40000
68-
flash (rx) : ORIGIN = 0x10000000, LENGTH = 0x40000
111+
ram (rwx) : ORIGIN = MBED_RAM_START, LENGTH = MBED_RAM_SIZE
112+
public_ram (rw) : ORIGIN = MBED_PUBLIC_RAM_START, LENGTH = MBED_PUBLIC_RAM_SIZE
113+
flash (rx) : ORIGIN = MBED_APP_START, LENGTH = (MBED_APP_SIZE - 0x8000)
69114

70115
/* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash.
71116
* You can assign sections to this memory region for only one of the cores.
@@ -315,10 +360,17 @@ SECTIONS
315360
} > ram
316361

317362

363+
/* Public RAM */
364+
.cy_sharedmem (NOLOAD):
365+
{
366+
. = ALIGN(4);
367+
KEEP(*(.cy_sharedmem))
368+
} > public_ram
369+
318370
/* Set stack top to end of RAM, and stack limit move down by
319371
* size of stack_dummy section */
320372
__StackTop = ORIGIN(ram) + LENGTH(ram);
321-
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
373+
__StackLimit = __StackTop - STACK_SIZE;
322374
PROVIDE(__stack = __StackTop);
323375

324376
/* Check if data + heap + stack exceeds RAM limit */

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cyb06xxa_cm0plus.icf

Lines changed: 79 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*******************************************************************************
22
* \file cyb06xxa_cm0plus.icf
3-
* \version 2.70.1
3+
* \version 2.80
44
*
55
* Linker file for the IAR compiler.
66
*
@@ -41,6 +41,66 @@
4141
/*-Specials-*/
4242
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
4343

44+
if (!isdefinedsymbol(MBED_ROM_START)) {
45+
define symbol MBED_ROM_START = 0x10000000;
46+
}
47+
48+
/* MBED_APP_START is being used by the bootloader build script and
49+
* will be calculate by the system. Without bootloader the MBED_APP_START
50+
* is equal to MBED_ROM_START
51+
*/
52+
if (!isdefinedsymbol(MBED_APP_START)) {
53+
define symbol MBED_APP_START = MBED_ROM_START;
54+
}
55+
56+
if (!isdefinedsymbol(MBED_ROM_SIZE)) {
57+
define symbol MBED_ROM_SIZE = 0x00010000;
58+
}
59+
60+
/* MBED_APP_SIZE is being used by the bootloader build script and
61+
* will be calculate by the system. Without bootloader the MBED_APP_SIZE
62+
* is equal to MBED_ROM_SIZE
63+
*/
64+
if (!isdefinedsymbol(MBED_APP_SIZE)) {
65+
define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
66+
}
67+
68+
if (!isdefinedsymbol(MBED_RAM_START)) {
69+
define symbol MBED_RAM_START = 0x080E0000;
70+
}
71+
72+
if (!isdefinedsymbol(MBED_RAM_SIZE)) {
73+
define symbol MBED_RAM_SIZE = 0x0000C000;
74+
}
75+
76+
/*-Sizes-*/
77+
if (!isdefinedsymbol(MBED_PUBLIC_RAM_SIZE)) {
78+
define symbol MBED_PUBLIC_RAM_SIZE = 0x200;
79+
}
80+
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
81+
82+
if (!isdefinedsymbol(__STACK_SIZE)) {
83+
define symbol MBED_BOOT_STACK_SIZE = 0x0400;
84+
} else {
85+
define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE;
86+
}
87+
}
88+
89+
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
90+
91+
define symbol __ICFEDIT_size_proc_stack__ = 0x0;
92+
93+
/* Defines the minimum heap size. The actual heap size will be expanded to the end of the stack region */
94+
if (!isdefinedsymbol(__HEAP_SIZE)) {
95+
define symbol __ICFEDIT_size_heap__ = 0x0400;
96+
} else {
97+
define symbol __ICFEDIT_size_heap__ = __HEAP_SIZE;
98+
}
99+
100+
if (!isdefinedsymbol(MBED_PUBLIC_RAM_START)) {
101+
define symbol MBED_PUBLIC_RAM_START = (MBED_RAM_START + MBED_RAM_SIZE - __ICFEDIT_size_cstack__ - MBED_PUBLIC_RAM_SIZE);
102+
}
103+
44104
/* The symbols below define the location and size of blocks of memory in the target.
45105
* Use these symbols to specify the memory regions available for allocation.
46106
*/
@@ -51,12 +111,14 @@ define symbol __ICFEDIT_intvec_start__ = 0x00000000;
51111
* where 'xx' is the device group; for example, 'cyb06xx7_cm4_dual.icf'.
52112
*/
53113
/* RAM */
54-
define symbol __ICFEDIT_region_IRAM1_start__ = 0x08000000;
55-
define symbol __ICFEDIT_region_IRAM1_end__ = 0x0803FFFF;
56-
114+
define symbol __ICFEDIT_region_IRAM1_start__ = MBED_RAM_START;
115+
define symbol __ICFEDIT_region_IRAM1_end__ = (MBED_RAM_START + MBED_RAM_SIZE - 1);
116+
/* Public RAM */
117+
define symbol __ICFEDIT_region_IRAM2_start__ = MBED_PUBLIC_RAM_START;
118+
define symbol __ICFEDIT_region_IRAM2_end__ = (MBED_PUBLIC_RAM_START + MBED_PUBLIC_RAM_SIZE - 1);
57119
/* Flash */
58-
define symbol __ICFEDIT_region_IROM1_start__ = 0x10000000;
59-
define symbol __ICFEDIT_region_IROM1_end__ = 0x1003FFFF;
120+
define symbol __ICFEDIT_region_IROM1_start__ = MBED_APP_START;
121+
define symbol __ICFEDIT_region_IROM1_end__ = (MBED_APP_START + MBED_APP_SIZE - 0x8000 - 1);
60122

61123
/* The following symbols define a 32K flash region used for EEPROM emulation.
62124
* This region can also be used as the general purpose flash.
@@ -101,29 +163,12 @@ define symbol __ICFEDIT_region_EROM2_end__ = 0x0;
101163
define symbol __ICFEDIT_region_EROM3_start__ = 0x0;
102164
define symbol __ICFEDIT_region_EROM3_end__ = 0x0;
103165

104-
105-
define symbol __ICFEDIT_region_IRAM2_start__ = 0x0;
106-
define symbol __ICFEDIT_region_IRAM2_end__ = 0x0;
107166
define symbol __ICFEDIT_region_ERAM1_start__ = 0x0;
108167
define symbol __ICFEDIT_region_ERAM1_end__ = 0x0;
109168
define symbol __ICFEDIT_region_ERAM2_start__ = 0x0;
110169
define symbol __ICFEDIT_region_ERAM2_end__ = 0x0;
111170
define symbol __ICFEDIT_region_ERAM3_start__ = 0x0;
112171
define symbol __ICFEDIT_region_ERAM3_end__ = 0x0;
113-
/*-Sizes-*/
114-
if (!isdefinedsymbol(__STACK_SIZE)) {
115-
define symbol __ICFEDIT_size_cstack__ = 0x1000;
116-
} else {
117-
define symbol __ICFEDIT_size_cstack__ = __STACK_SIZE;
118-
}
119-
define symbol __ICFEDIT_size_proc_stack__ = 0x0;
120-
121-
/* Defines the minimum heap size. The actual heap size will be expanded to the end of the stack region */
122-
if (!isdefinedsymbol(__HEAP_SIZE)) {
123-
define symbol __ICFEDIT_size_heap__ = 0x0400;
124-
} else {
125-
define symbol __ICFEDIT_size_heap__ = __HEAP_SIZE;
126-
}
127172
/**** End of ICF editor section. ###ICF###*/
128173

129174
/* The size of the MCU boot header area at the start of FLASH */
@@ -141,7 +186,13 @@ define region IROM7_region = mem:[from __ICFEDIT_region_IROM7_start__ to __ICFED
141186
define region IROM8_region = mem:[from __ICFEDIT_region_IROM8_start__ to __ICFEDIT_region_IROM8_end__];
142187
define region EROM1_region = mem:[from __ICFEDIT_region_EROM1_start__ to __ICFEDIT_region_EROM1_end__];
143188
define region IRAM1_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__];
189+
define region IRAM2_region = mem:[from __ICFEDIT_region_IRAM2_start__ to __ICFEDIT_region_IRAM2_end__];
144190

191+
define block RAM_DATA {readwrite section .data};
192+
define block RAM_OTHER {readwrite section * };
193+
define block RAM_NOINIT {readwrite section .noinit};
194+
define block RAM_BSS {readwrite section .bss};
195+
define block RAM with fixed order {block RAM_DATA, block RAM_OTHER, block RAM_NOINIT, block RAM_BSS};
145196
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
146197
define block PROC_STACK with alignment = 8, size = __ICFEDIT_size_proc_stack__ { };
147198
define block HEAP with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { };
@@ -184,9 +235,13 @@ place at address (__ICFEDIT_region_IROM1_start__ + BOOT_HEADER_SIZE) { block RO
184235

185236
/* RAM */
186237
place at start of IRAM1_region { readwrite section .intvec_ram};
187-
place in IRAM1_region { readwrite };
238+
place in IRAM1_region { block RAM};
239+
place in IRAM1_region { readwrite section .cy_ramfunc };
188240
place at end of IRAM1_region { block HSTACK };
189241

242+
/* Public RAM */
243+
place at start of IRAM2_region { section .cy_sharedmem };
244+
190245
/* These sections are used for additional metadata (silicon revision, Silicon/JTAG ID, etc.) storage. */
191246
".cymeta" : place at address mem : 0x90500000 { readonly section .cymeta };
192247

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