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[M2351] Support TFM level 1
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32 files changed

+1996
-673
lines changed

32 files changed

+1996
-673
lines changed

‎features/storage/kvstore/conf/tdb_internal/mbed_lib.json

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@@ -31,6 +31,10 @@
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"internal_size": "0x200000",
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"internal_base_address": "0x00200000"
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},
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"NU_PFM_M2351_S": {
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"internal_size": "0x8000",
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"internal_base_address": "(PSA_SECURE_ROM_START + PSA_SECURE_ROM_SIZE - 0x1000 - MBED_CONF_STORAGE_TDB_INTERNAL_INTERNAL_SIZE)"
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},
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"MCU_PSOC6": {
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"internal_size": "0x10000"
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}

‎targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TARGET_TFM/cmsis_nvic_virtual.c

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/*
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* Copyright (c) 2018-2019, Nuvoton Technology Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "cmsis.h"
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#include "cmsis_nvic_virtual.h"
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#include "psa/lifecycle.h"
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void NVIC_SystemReset(void)
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{
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mbed_psa_system_reset();
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}

‎targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TARGET_TFM/cmsis_nvic_virtual.h

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/*
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* Copyright (c) 2018-2019, Nuvoton Technology Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
16+
* limitations under the License.
17+
*/
18+
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#ifndef NVIC_VIRTUAL_H
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#define NVIC_VIRTUAL_H
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#ifdef __cplusplus
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extern "C" {
24+
#endif
25+
26+
/* NVIC functions */
27+
#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping
28+
#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping
29+
#define NVIC_EnableIRQ __NVIC_EnableIRQ
30+
#define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ
31+
#define NVIC_DisableIRQ __NVIC_DisableIRQ
32+
#define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ
33+
#define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ
34+
#define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
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#define NVIC_GetActive __NVIC_GetActive
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#define NVIC_SetPriority __NVIC_SetPriority
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#define NVIC_GetPriority __NVIC_GetPriority
38+
39+
/**
40+
* \brief Overriding the default CMSIS system reset implementation by calling
41+
* secure TFM service.
42+
*
43+
*/
44+
void NVIC_SystemReset(void);
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46+
#ifdef __cplusplus
47+
}
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#endif
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#endif

‎targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_ARMC6/M2351.sct

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#! armclang -E
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/*
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* Copyright (c) 2018-2019, Nuvoton Technology Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
15+
* distributed under the License is distributed on an "AS IS" BASIS,
16+
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
17+
* See the License for the specific language governing permissions and
18+
* limitations under the License.
19+
*/
20+
21+
#include "../../../device/partition_M2351_mem.h"
22+
23+
#if !defined(MBED_BOOT_STACK_SIZE)
24+
#define MBED_BOOT_STACK_SIZE 0x400
25+
#endif
26+
27+
LR_IROM1 MBED_APP_START
28+
{
29+
/* load address = execution address */
30+
ER_IROM1 +0
31+
{
32+
*(RESET, +First)
33+
*(InRoot$$Sections)
34+
.ANY (+RO)
35+
}
36+
37+
ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_BOOT_STACK_SIZE
38+
{
39+
}
40+
41+
/* Reserve for vectors
42+
*
43+
* Vector table base address is required to be 128-byte aligned at a minimum.
44+
* A PE might impose further restrictions on it. */
45+
ER_IRAMVEC AlignExpr(+0, 128) EMPTY (4*(16 + 102))
46+
{
47+
}
48+
49+
RW_IRAM1 AlignExpr(+0, 16)
50+
{
51+
.ANY (+RW +ZI)
52+
}
53+
54+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_APP_START + MBED_RAM_APP_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16))
55+
{
56+
}
57+
}
58+
59+
ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE))
60+
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= MBED_RAM_APP_START + MBED_RAM_APP_SIZE)

‎targets/TARGET_NUVOTON/TARGET_M2351/device/TOOLCHAIN_GCC_ARM/M2351.ld renamed to ‎targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_GCC_ARM/M2351.ld

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@@ -1,5 +1,5 @@
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/*
2-
* Copyright (c) 2019-2020, Nuvoton Technology Corporation
2+
* Copyright (c) 2018-2019, Nuvoton Technology Corporation
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*
@@ -20,93 +20,21 @@
2020
* Nuvoton M2351 GCC linker script file
2121
*/
2222

23-
#include "../partition_M2351_mem.h"
24-
25-
#ifndef NU_TZ_NSC_SIZE
26-
#define NU_TZ_NSC_SIZE (0x1000)
27-
#endif
28-
29-
#if defined(DOMAIN_NS) && DOMAIN_NS
30-
31-
#ifndef MBED_APP_START
32-
#define MBED_APP_START NU_ROM_START_NS
33-
#endif
34-
35-
#ifndef MBED_APP_SIZE
36-
#define MBED_APP_SIZE NU_ROM_SIZE_NS
37-
#endif
38-
39-
#ifndef MBED_RAM_APP_START
40-
#define MBED_RAM_APP_START NU_RAM_START_NS
41-
#endif
42-
43-
#ifndef MBED_RAM_APP_SIZE
44-
#define MBED_RAM_APP_SIZE NU_RAM_SIZE_NS
45-
#endif
23+
#include "../../../device/partition_M2351_mem.h"
4624

4725
#if !defined(MBED_BOOT_STACK_SIZE)
4826
#define MBED_BOOT_STACK_SIZE 0x400
4927
#endif
5028

51-
#else
52-
53-
#ifndef MBED_APP_START
54-
#define MBED_APP_START NU_ROM_START_S
55-
#endif
56-
57-
#ifndef MBED_APP_SIZE
58-
#define MBED_APP_SIZE NU_ROM_SIZE_S
59-
#endif
60-
61-
#ifndef MBED_RAM_APP_START
62-
#define MBED_RAM_APP_START NU_RAM_START_S
63-
#endif
64-
65-
#ifndef MBED_RAM_APP_SIZE
66-
#define MBED_RAM_APP_SIZE NU_RAM_SIZE_S
67-
#endif
68-
69-
#ifndef MBED_BOOT_STACK_SIZE
70-
#define MBED_BOOT_STACK_SIZE 0x400
71-
#endif
72-
73-
#endif
74-
7529
StackSize = MBED_BOOT_STACK_SIZE;
7630

77-
/* Requirements for NSC location
78-
*
79-
* 1. By IDAU, 0~0x4000 is secure. NSC can only locate in 0x4000~0x10000000.
80-
* 2. Greentea flash IAP uses last 4 sectors for its test. Avoid this range.
81-
* 3. Greentea NVSTORE uses last 2 sectors or 4KiB x 2 for its test. Avoid this range.
82-
* 4. NSC region size defaults to 4KiB if not defined.
83-
*/
84-
#ifndef NU_TZ_NSC_START
85-
#define NU_TZ_NSC_START (MBED_APP_START + MBED_APP_SIZE - 0x2000 - NU_TZ_NSC_SIZE)
86-
#endif
87-
88-
89-
#if defined(DOMAIN_NS) && DOMAIN_NS
90-
9131
MEMORY
9232
{
9333
VECTORS (rx) : ORIGIN = MBED_APP_START, LENGTH = 0x00000400
9434
FLASH (rx) : ORIGIN = MBED_APP_START + 0x400, LENGTH = MBED_APP_SIZE - 0x400
9535
RAM_INTERN (rwx) : ORIGIN = MBED_RAM_APP_START, LENGTH = MBED_RAM_APP_SIZE
9636
}
9737

98-
#else
99-
100-
MEMORY
101-
{
102-
VECTORS (rx) : ORIGIN = MBED_APP_START, LENGTH = 0x00000400
103-
FLASH (rx) : ORIGIN = MBED_APP_START + 0x400, LENGTH = NU_TZ_NSC_START - MBED_APP_START - 0x400
104-
NSC_FLASH (rx) : ORIGIN = NU_TZ_NSC_START, LENGTH = NU_TZ_NSC_SIZE
105-
RAM_INTERN (rwx) : ORIGIN = MBED_RAM_APP_START, LENGTH = MBED_RAM_APP_SIZE
106-
}
107-
108-
#endif
109-
11038
/**
11139
* Must match cmsis_nvic.h
11240
*/
@@ -193,21 +121,27 @@ SECTIONS
193121
KEEP(*(.eh_frame*))
194122
} > FLASH
195123

196-
#if (! defined(DOMAIN_NS)) || (! DOMAIN_NS)
197-
/* Veneer$$CMSE : */
198-
.gnu.sgstubs :
124+
/* Stack Pointer (SP) configuration with GCC_ARM
125+
*
126+
* SP would go through the following configuration sequence:
127+
* (1) SP(MSP) <- Entry 0 of vector table (on H/W reset)
128+
* (2) Switch SP from MSP to PSP in startup file (as TFM requests)
129+
* (3) SP(PSP) <- __stack (in _start(), C/C++ runtime initialization)
130+
*
131+
* S(3) may cause SP(PSP) incorrectly configured. To avoid this error, __stack
132+
* is assigned conditionally according to Secure PSA or not.
133+
*/
134+
135+
.stack (NOLOAD) :
199136
{
200-
__sgstubs_start = .;
201-
*(.gnu.sgstubs.*)
202-
__sgstubs_end = .;
203-
} > NSC_FLASH
137+
. = ALIGN(8);
138+
__StackLimit = .;
139+
. += StackSize;
140+
__StackTop = .;
141+
} > RAM_INTERN
204142

205-
Load$$LR$$LR_IROM_NSC$$Base = NU_TZ_NSC_START;
206-
Load$$LR$$LR_IROM_NSC$$Length = NU_TZ_NSC_SIZE;
143+
PROVIDE(__stack = __StackTop);
207144

208-
/* By IDAU, 0~0x4000 is secure. NSC can only locate in 0x4000~0x10000000. */
209-
ASSERT(__sgstubs_start >= 0x4000, "By IDAU, 0~0x4000 is secure. NSC can only locate in 0x4000~0x10000000.")
210-
#endif
211145
.ARM.extab :
212146
{
213147
*(.ARM.extab* .gnu.linkonce.armextab.*)
@@ -220,23 +154,6 @@ SECTIONS
220154
__exidx_end = .;
221155
} > FLASH
222156

223-
/* .stack section doesn't contains any symbols. It is only
224-
* used for linker to reserve space for the main stack section
225-
* WARNING: .stack should come immediately after the last secure memory
226-
* section. This provides stack overflow detection. */
227-
.stack (NOLOAD):
228-
{
229-
__StackLimit = .;
230-
*(.stack*);
231-
. += StackSize - (. - __StackLimit);
232-
} > RAM_INTERN
233-
234-
/* Set stack top to end of RAM, and stack limit move down by
235-
* size of stack_dummy section */
236-
__StackTop = ADDR(.stack) + SIZEOF(.stack);
237-
__StackLimit = ADDR(.stack);
238-
PROVIDE(__stack = __StackTop);
239-
240157
/* Relocate vector table in SRAM */
241158
.isr_vector.reloc (NOLOAD) :
242159
{
@@ -245,7 +162,7 @@ SECTIONS
245162
. += __vector_size;
246163
PROVIDE(__end_vector_table__ = .);
247164
} > RAM_INTERN
248-
165+
249166
.data :
250167
{
251168
PROVIDE( __etext = LOADADDR(.data) );
@@ -288,15 +205,18 @@ SECTIONS
288205
__bss_end__ = .;
289206
} > RAM_INTERN
290207

291-
.heap (NOLOAD):
208+
.heap (NOLOAD) :
292209
{
210+
. = ALIGN(8);
293211
__end__ = .;
294212
end = __end__;
295213
*(.heap*);
296214
. += (ORIGIN(RAM_INTERN) + LENGTH(RAM_INTERN) - .);
297215
__HeapLimit = .;
298216
} > RAM_INTERN
299-
217+
Image$$ARM_LIB_HEAP$$ZI$$Base = ADDR(.heap);
218+
Image$$ARM_LIB_HEAP$$ZI$$Limit = ADDR(.heap) + SIZEOF(.heap);
219+
300220
PROVIDE(__heap_size = SIZEOF(.heap));
301221
PROVIDE(__mbed_sbrk_start = ADDR(.heap));
302222
PROVIDE(__mbed_krbs_start = ADDR(.heap) + SIZEOF(.heap));

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