|
| 1 | +/** |
| 2 | + ******************************************************************************* |
| 3 | + * @file txzp_adc.h |
| 4 | + * @brief This file provides all the functions prototypes for ADC driver. |
| 5 | + * @version V1.0.0 |
| 6 | + * |
| 7 | + * DO NOT USE THIS SOFTWARE WITHOUT THE SOFTWARE LICENSE AGREEMENT. |
| 8 | + * |
| 9 | + * Copyright(C) Toshiba Electronic Device Solutions Corporation 2021 |
| 10 | + ******************************************************************************* |
| 11 | + */ |
| 12 | +/*------------------------------------------------------------------------------*/ |
| 13 | +/* Define to prevent recursive inclusion */ |
| 14 | +/*------------------------------------------------------------------------------*/ |
| 15 | +#ifndef __ADC_H |
| 16 | +#define __ADC_H |
| 17 | + |
| 18 | +#ifdef __cplusplus |
| 19 | +extern "C" { |
| 20 | +#endif |
| 21 | + |
| 22 | +/*------------------------------------------------------------------------------*/ |
| 23 | +/* Includes */ |
| 24 | +/*------------------------------------------------------------------------------*/ |
| 25 | +#include "txzp_driver_def.h" |
| 26 | +#include "txzp_adc_ch.h" |
| 27 | + |
| 28 | +/** |
| 29 | + * @addtogroup Periph_Driver Peripheral Driver |
| 30 | + * @{ |
| 31 | + */ |
| 32 | + |
| 33 | +/** |
| 34 | + * @defgroup ADC ADC |
| 35 | + * @brief ADC Driver. |
| 36 | + * @{ |
| 37 | + */ |
| 38 | +/*------------------------------------------------------------------------------*/ |
| 39 | +/* Macro Definition */ |
| 40 | +/*------------------------------------------------------------------------------*/ |
| 41 | +/** |
| 42 | + * @defgroup ADC_Exported_define ADC Exported Define |
| 43 | + * @{ |
| 44 | + */ |
| 45 | + |
| 46 | +/** |
| 47 | + * @defgroup ADC_ChannelMax Channel Num Max |
| 48 | + * @brief Max Num of channel. |
| 49 | + * @{ |
| 50 | + */ |
| 51 | +#define ADC_NUM_MAX ((uint32_t)24) /*!< Max Num of conversion. */ |
| 52 | +/** |
| 53 | + * @} |
| 54 | + */ /* End of group ADC_ChannelMax */ |
| 55 | + |
| 56 | +/** |
| 57 | + * @defgroup ADC_CONVERT_TIME AD Convert Time & AVDD. |
| 58 | + * @brief Select AD Convert Time & AVDD. |
| 59 | + * @{ |
| 60 | + */ |
| 61 | +#define ADC_CONVERT_TIME_0_96_AVDD_4_5 ((uint32_t)0x00000000) /*!< ADC CONVERT TIME 0.96u AVDD 4.5V */ |
| 62 | +#define ADC_CONVERT_TIME_0_91_AVDD_4_5 ((uint32_t)0x00000001) /*!< ADC CONVERT TIME 0.91u AVDD 4.5V */ |
| 63 | +#define ADC_CONVERT_TIME_1_09_AVDD_4_5 ((uint32_t)0x00000002) /*!< ADC CONVERT TIME 1.09u AVDD 4.5V */ |
| 64 | +/** |
| 65 | + * @} |
| 66 | + */ /* End of group ADC_CONVERT_TIME */ |
| 67 | + |
| 68 | +/** |
| 69 | + * @defgroup ADC_RCUT AD RCUT. |
| 70 | + * @brief Select AD RCUT. |
| 71 | + * @{ |
| 72 | + */ |
| 73 | +#define ADC_RCUT_NORMAL ((uint32_t)0x00000000) /*!< ADC RCUT NORMAL */ |
| 74 | +#define ADC_RCUT_LOW ((uint32_t)0x00000002) /*!< ADC RCUT LOW */ |
| 75 | +/** |
| 76 | + * @} |
| 77 | + */ /* End of group ADC_RCUT */ |
| 78 | + |
| 79 | +/** |
| 80 | + * @defgroup ADC_IntEnable Interrupt Enable. |
| 81 | + * @brief Interrupt Enable. |
| 82 | + * @{ |
| 83 | + */ |
| 84 | +#define ADC_INT_DISABLE ((uint32_t)0x00000000) /*!< Disable. */ |
| 85 | +#define ADC_INT_ENABLE ((uint32_t)0x00000080) /*!< Enable. */ |
| 86 | +/** |
| 87 | + * @} |
| 88 | + */ /* End of group ADC_IntEnable */ |
| 89 | + |
| 90 | +/** |
| 91 | + * @defgroup ADC_Conversion Conversion Method. |
| 92 | + * @brief Select conversion method. |
| 93 | + * @{ |
| 94 | + */ |
| 95 | +#define ADC_CONVERSION_DISABLE ((uint32_t)0x00000000) /*!< Disable. */ |
| 96 | +#define ADC_CONVERSION_CNT ((uint32_t)0x00000020) /*!< Continuation. */ |
| 97 | +#define ADC_CONVERSION_SGL ((uint32_t)0x00000040) /*!< Single. */ |
| 98 | +#define ADC_CONVERSION_TRG ((uint32_t)0x00000060) /*!< Universal Trigger. */ |
| 99 | +/** |
| 100 | + * @} |
| 101 | + */ /* End of group ADC_Conversion */ |
| 102 | + |
| 103 | +/** |
| 104 | + * @defgroup ADC_AINRange AIN Range. |
| 105 | + * @brief Range of AIN Macro Definisiton. |
| 106 | + * @brief Range of AIN be set "(ADC_AIN_RANGE_MIN <= Value <= ADC_AIN_RANGE_MAX)". |
| 107 | + * @{ |
| 108 | + */ |
| 109 | +#define ADC_AIN_RANGE_MIN ((uint32_t)0x00000000) /*!< Minimum Value :AINx00 */ |
| 110 | +#define ADC_AIN_RANGE_MAX ((uint32_t)0x00000017) /*!< Maximum Value :AINx23 */ |
| 111 | +/** |
| 112 | + * @} |
| 113 | + */ /* End of group ADC_AINRange */ |
| 114 | + |
| 115 | +/** |
| 116 | + * @defgroup ADC_Status AD Running Status. |
| 117 | + * @brief AD Running Status. |
| 118 | + * @{ |
| 119 | + */ |
| 120 | +#define ADC_STATUS_MASK ((uint32_t)0x00000080) /*!< for Mask. */ |
| 121 | +#define ADC_STATUS_SLEEP ((uint32_t)0x00000000) /*!< Sleep. */ |
| 122 | +#define ADC_STATUS_RUNNING ((uint32_t)0x00000080) /*!< Running. */ |
| 123 | +/** |
| 124 | + * @} |
| 125 | + */ /* End of group ADC_Status */ |
| 126 | + |
| 127 | +/** |
| 128 | + * @defgroup ADC_ContinuityStatus Continuity Conversion Running Status. |
| 129 | + * @brief Continuity Conversion Running Status. |
| 130 | + * @{ |
| 131 | + */ |
| 132 | +#define ADC_CNT_STATUS_MASK ((uint32_t)0x00000008) /*!< for Mask. */ |
| 133 | +#define ADC_CNT_STATUS_SLEEP ((uint32_t)0x00000000) /*!< Sleep. */ |
| 134 | +#define ADC_CNT_STATUS_RUNNING ((uint32_t)0x00000008) /*!< Running. */ |
| 135 | +/** |
| 136 | + * @} |
| 137 | + */ /* End of group ADC_ContinuityStatus */ |
| 138 | + |
| 139 | +/** |
| 140 | + * @defgroup ADC_SingleStatus Single Conversion Running Status. |
| 141 | + * @brief Single Conversion Running Status. |
| 142 | + * @{ |
| 143 | + */ |
| 144 | +#define ADC_SGL_STATUS_MASK ((uint32_t)0x00000004) /*!< for Mask. */ |
| 145 | +#define ADC_SGL_STATUS_SLEEP ((uint32_t)0x00000000) /*!< Sleep. */ |
| 146 | +#define ADC_SGL_STATUS_RUNNING ((uint32_t)0x00000004) /*!< Running. */ |
| 147 | +/** |
| 148 | + * @} |
| 149 | + */ /* End of group ADC_SingleStatus */ |
| 150 | + |
| 151 | +/** |
| 152 | + * @defgroup ADC_TriggerStatus Trigger Conversion Running Status. |
| 153 | + * @brief Trigger Conversion Running Status. |
| 154 | + * @{ |
| 155 | + */ |
| 156 | +#define ADC_TRG_STATUS_MASK ((uint32_t)0x00000002) /*!< for Mask. */ |
| 157 | +#define ADC_TRG_STATUS_SLEEP ((uint32_t)0x00000000) /*!< Sleep. */ |
| 158 | +#define ADC_TRG_STATUS_RUNNING ((uint32_t)0x00000002) /*!< Running. */ |
| 159 | +/** |
| 160 | + * @} |
| 161 | + */ /* End of group ADC_TriggerStatus */ |
| 162 | + |
| 163 | +/** |
| 164 | + * @defgroup ADC_SH_TriggerPattern TriggerPattern |
| 165 | + * @brief SH TriggerPattern. |
| 166 | + * @{ |
| 167 | + */ |
| 168 | +#define ADC_SH_TRGPAT_UPPER_0 ((uint32_t)0x00000000) /*!< Triger Combination Upper pattern 0 */ |
| 169 | +#define ADC_SH_TRGPAT_UPPER_1 ((uint32_t)0x00000004) /*!< Triger Combination Upper pattern 1 */ |
| 170 | +#define ADC_SH_TRGPAT_UPPER_2 ((uint32_t)0x00000008) /*!< Triger Combination Upper pattern 2 */ |
| 171 | +#define ADC_SH_TRGPAT_UPPER_3 ((uint32_t)0x0000000C) /*!< Triger Combination Upper pattern 3 */ |
| 172 | +#define ADC_SH_TRGPAT_LOWER_0 ((uint32_t)0x00000000) /*!< Triger Combination Lower pattern 0 */ |
| 173 | +#define ADC_SH_TRGPAT_LOWER_1 ((uint32_t)0x00000001) /*!< Triger Combination Lower pattern 1 */ |
| 174 | +#define ADC_SH_TRGPAT_LOWER_2 ((uint32_t)0x00000002) /*!< Triger Combination Lower pattern 2 */ |
| 175 | +#define ADC_SH_TRGPAT_LOWER_3 ((uint32_t)0x00000003) /*!< Triger Combination Lower pattern 3 */ |
| 176 | +/** |
| 177 | + * @} |
| 178 | + */ /* End of group ADC_SH_TriggerPattern */ |
| 179 | + |
| 180 | +/** |
| 181 | + * @} |
| 182 | + */ /* End of group ADC_Exported_define */ |
| 183 | + |
| 184 | +/*------------------------------------------------------------------------------*/ |
| 185 | +/* Enumerated Type Definition */ |
| 186 | +/*------------------------------------------------------------------------------*/ |
| 187 | +/** |
| 188 | + * @defgroup ADC_Exported_define ADC Exported Define |
| 189 | + * @{ |
| 190 | + */ |
| 191 | + |
| 192 | +/* no define */ |
| 193 | + |
| 194 | +/** |
| 195 | + * @} |
| 196 | + */ /* End of group ADC_Exported_define */ |
| 197 | + |
| 198 | +/*------------------------------------------------------------------------------*/ |
| 199 | +/* Structure Definition */ |
| 200 | +/*------------------------------------------------------------------------------*/ |
| 201 | +/** |
| 202 | + * @defgroup ADC_Exported_typedef ADC Exported Typedef |
| 203 | + * @{ |
| 204 | + */ |
| 205 | +/*----------------------------------*/ |
| 206 | +/** |
| 207 | + * @brief Initial setting structure definenition. |
| 208 | +*/ |
| 209 | +/*----------------------------------*/ |
| 210 | +typedef struct { |
| 211 | + uint32_t id; /*!< ID: User value. */ |
| 212 | + uint32_t convert_time; /*!< AD Convert time & AVDD. |
| 213 | + : Use @ref ADC_CONVERT_TIME. */ |
| 214 | + uint32_t refbsel; /*!< VREFHz/AINxn. |
| 215 | + : Use @ref ADC_REFBSEL. */ |
| 216 | + uint32_t rcut; /*!< RCUT. |
| 217 | + : Use @ref ADC_RCUT. */ |
| 218 | + |
| 219 | +} adc_initial_setting_t; |
| 220 | + |
| 221 | +/*----------------------------------*/ |
| 222 | +/** |
| 223 | + * @brief Channel Setting. \n |
| 224 | +*/ |
| 225 | +/*----------------------------------*/ |
| 226 | +typedef struct { |
| 227 | + uint32_t ain; /*!< AIN. |
| 228 | + : Range is @ref ADC_AINRange. */ |
| 229 | +} adc_channel_setting_t; |
| 230 | + |
| 231 | +/*----------------------------------*/ |
| 232 | +/** |
| 233 | + * @brief Driver internal information structure definenition. |
| 234 | +*/ |
| 235 | +/*----------------------------------*/ |
| 236 | +typedef struct { |
| 237 | + adc_ch_t ch[ADC_NUM_MAX]; /*!< Channel Instance. */ |
| 238 | +} adc_internal_info_t; |
| 239 | + |
| 240 | +/*----------------------------------*/ |
| 241 | +/** |
| 242 | + * @brief ADC handle structure definenition. |
| 243 | +*/ |
| 244 | +/*----------------------------------*/ |
| 245 | +typedef struct { |
| 246 | + TSB_AD_TypeDef *p_instance; /*!< Registers base address. */ |
| 247 | + adc_initial_setting_t init; /*!< Initial setting. */ |
| 248 | + void (*handler)(uint32_t id, TXZ_Result result); /*!< Notity Conversion Done. */ |
| 249 | + adc_internal_info_t info; /*!< Driver internal information. */ |
| 250 | +} adc_t; |
| 251 | + |
| 252 | +/** |
| 253 | + * @} |
| 254 | + */ /* End of group ADC_Exported_typedef */ |
| 255 | + |
| 256 | +/*------------------------------------------------------------------------------*/ |
| 257 | +/* Functions */ |
| 258 | +/*------------------------------------------------------------------------------*/ |
| 259 | +/** |
| 260 | + * @defgroup ADC_Exported_functions ADC Exported Functions |
| 261 | + * @{ |
| 262 | + */ |
| 263 | +TXZ_Result adc_init(adc_t *p_obj); |
| 264 | +TXZ_Result adc_deinit(adc_t *p_obj); |
| 265 | +TXZ_Result adc_channel_setting(adc_t *p_obj, uint32_t ch, adc_channel_setting_t *p_setting); |
| 266 | +TXZ_Result adc_channel_clear(adc_t *p_obj, uint32_t ch); |
| 267 | +TXZ_Result adc_channel_get_value(adc_t *p_obj, uint32_t ch, uint32_t *p_value); |
| 268 | +TXZ_Result adc_start(adc_t *p_obj); |
| 269 | +TXZ_Result adc_stop(adc_t *p_obj); |
| 270 | +TXZ_Result adc_startIt(adc_t *p_obj); |
| 271 | +TXZ_Result adc_stopIt(adc_t *p_obj); |
| 272 | +void adc_irq_handler(adc_t *p_obj); |
| 273 | +/** |
| 274 | + * @} |
| 275 | + */ /* End of group ADC_Exported_functions */ |
| 276 | + |
| 277 | +/** |
| 278 | + * @} |
| 279 | + */ /* End of group ADC */ |
| 280 | + |
| 281 | +/** |
| 282 | + * @} |
| 283 | + */ /* End of group Periph_Driver */ |
| 284 | + |
| 285 | +#ifdef __cplusplus |
| 286 | +} |
| 287 | +#endif /* __cplusplus */ |
| 288 | +#endif /* __ADC_H */ |
| 289 | + |
| 290 | + |
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