Merge pull request #14135 from hugueskamba/hk_heap_size_fix_nxp

0xc0170 · web-flow · commit 4c25b88287c4 · 2021-01-11T11:42:45.000Z
NXP: Fix heap size formula in scatter files
diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct
@@ -16,6 +16,8 @@
   #define MBED_RAM_SIZE             0x4000
 #endif
 
+#define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE)
+
 
 #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
 #  if defined(MBED_BOOT_STACK_SIZE)
@@ -38,11 +40,11 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (+RO)
   }
 
-  RW_IRAM1  (MBED_RAM_START+VECTOR_SIZE)  (MBED_RAM_SIZE-VECTOR_SIZE)  {  ; RW data
+  RW_IRAM1  MBED_RAM1_START  (MBED_RAM_SIZE-VECTOR_SIZE)  {  ; RW data
    .ANY (+RW +ZI)
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM1_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
   }
 
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack
diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct
@@ -32,6 +32,8 @@
 
 #define RAM_FIXED_SIZE              (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE)
 
+#define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE)
+
 LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
 
   ER_IROM1  MBED_APP_START  MBED_APP_SIZE  {  ; load address = execution address
@@ -40,11 +42,11 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
    .ANY (+RO)
   }
 
-  RW_IRAM1  (MBED_RAM_START+VECTOR_SIZE)  (MBED_RAM_SIZE-VECTOR_SIZE)  {  ; RW data
+  RW_IRAM1  MBED_RAM1_START  (MBED_RAM_SIZE-VECTOR_SIZE)  {  ; RW data
    .ANY (+RW +ZI)
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM1_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
   }
 
   ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack
diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct
@@ -32,6 +32,8 @@
 
 #define RAM_FIXED_SIZE              (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE+0x20)
 
+#define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE)
+
 LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
 
   ER_IROM0  MBED_APP_START  0x2FC  {  ; load address = execution address
@@ -49,11 +51,11 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
   }
 
   ; 32KB (RAM size) - 0xC8 (NIVT) - 32 (topmost 32 bytes used by IAP functions) = 0x7F18
-  RW_IRAM1  (MBED_RAM_START+VECTOR_SIZE)  (MBED_RAM_SIZE-VECTOR_SIZE-0x20)  {  ; RW data
+  RW_IRAM1  MBED_RAM1_START  (MBED_RAM_SIZE-VECTOR_SIZE-0x20)  {  ; RW data
    .ANY (+RW +ZI)
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM1_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
   }
 
   RW_IRAM2 0x2007C000 0x4000  {  ; RW data, USB RAM

Original file line number	Diff line number	Diff line change
`@@ -16,6 +16,8 @@`
`16`	`16`	`#define MBED_RAM_SIZE 0x4000`
`17`	`17`	`#endif`
`18`	`18`
	`19`	`+#define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE)`
	`20`	`+`
`19`	`21`
`20`	`22`	`#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)`
`21`	`23`	`# if defined(MBED_BOOT_STACK_SIZE)`
`@@ -38,11 +40,11 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region`
`38`	`40`	`.ANY (+RO)`
`39`	`41`	`}`
`40`	`42`
`41`		`- RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data`
	`43`	`+ RW_IRAM1 MBED_RAM1_START (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data`
`42`	`44`	`.ANY (+RW +ZI)`
`43`	`45`	`}`
`44`	`46`
`45`		`- ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {`
	`47`	`+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM1_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {`
`46`	`48`	`}`
`47`	`49`
`48`	`50`	`ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack`
Original file line number	Diff line number	Diff line change
`@@ -32,6 +32,8 @@`
`32`	`32`
`33`	`33`	`#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE)`
`34`	`34`
	`35`	`+#define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE)`
	`36`	`+`
`35`	`37`	`LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region`
`36`	`38`
`37`	`39`	`ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address`
`@@ -40,11 +42,11 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region`
`40`	`42`	`.ANY (+RO)`
`41`	`43`	`}`
`42`	`44`
`43`		`- RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data`
	`45`	`+ RW_IRAM1 MBED_RAM1_START (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data`
`44`	`46`	`.ANY (+RW +ZI)`
`45`	`47`	`}`
`46`	`48`
`47`		`- ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {`
	`49`	`+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM1_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {`
`48`	`50`	`}`
`49`	`51`
`50`	`52`	`ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack`