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[NUC472/M453] Fix greentea lp_ticker failed tests
1 parent dee2f27 commit 516efa3

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2 files changed

+67
-61
lines changed

2 files changed

+67
-61
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‎targets/TARGET_NUVOTON/TARGET_M451/lp_ticker.c

Lines changed: 34 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -24,25 +24,22 @@
2424
#include "critical.h"
2525

2626
// lp_ticker tick = us = timestamp
27-
// clock of timer peripheral = ms
28-
#define US_PER_TICK (1)
27+
#define US_PER_TICK (1)
28+
#define US_PER_SEC (1000 * 1000)
2929

30-
#define MS_PER_TMR2_INT (1000 * 10)
31-
#define TMR2_FIRE_FREQ (1000 / MS_PER_TMR2_INT)
32-
#define MS_PER_TMR2_CLK 1
33-
#define TMR2_CLK_FREQ (1000 / MS_PER_TMR2_CLK)
34-
35-
#define MS_PER_TMR3_CLK 1
36-
#define TMR3_CLK_FREQ (1000 / MS_PER_TMR3_CLK)
30+
#define US_PER_TMR2_INT (US_PER_SEC * 10)
31+
#define TMR2_CLK_PER_SEC (__LXT)
32+
#define TMR2_CLK_PER_TMR2_INT ((uint32_t) ((uint64_t) US_PER_TMR2_INT * TMR2_CLK_PER_SEC / US_PER_SEC))
33+
#define TMR3_CLK_PER_SEC (__LXT)
3734

3835
static void tmr2_vec(void);
3936
static void tmr3_vec(void);
4037
static void lp_ticker_arm_cd(void);
4138

4239
static int lp_ticker_inited = 0;
4340
static volatile uint32_t counter_major = 0;
44-
static volatile int cd_major_minor_ms = 0;
45-
static volatile int cd_minor_ms = 0;
41+
static volatile int cd_major_minor_clks = 0;
42+
static volatile int cd_minor_clks = 0;
4643
static volatile uint32_t wakeup_tick = (uint32_t) -1;
4744

4845
// NOTE: To wake the system from power down mode, timer clock source must be ether LXT or LIRC.
@@ -61,8 +58,8 @@ void lp_ticker_init(void)
6158
lp_ticker_inited = 1;
6259

6360
counter_major = 0;
64-
cd_major_minor_ms = 0;
65-
cd_minor_ms = 0;
61+
cd_major_minor_clks = 0;
62+
cd_minor_clks = 0;
6663
wakeup_tick = (uint32_t) -1;
6764

6865
// Reset module
@@ -78,9 +75,10 @@ void lp_ticker_init(void)
7875

7976
// Configure clock
8077
uint32_t clk_timer2 = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(timer2_modinit.modname));
81-
uint32_t prescale_timer2 = clk_timer2 / TMR2_CLK_FREQ - 1;
78+
uint32_t prescale_timer2 = clk_timer2 / TMR2_CLK_PER_SEC - 1;
8279
MBED_ASSERT((prescale_timer2 != (uint32_t) -1) && prescale_timer2 <= 127);
83-
uint32_t cmp_timer2 = MS_PER_TMR2_INT / MS_PER_TMR2_CLK;
80+
MBED_ASSERT((clk_timer2 % TMR2_CLK_PER_SEC) == 0);
81+
uint32_t cmp_timer2 = TMR2_CLK_PER_TMR2_INT;
8482
MBED_ASSERT(cmp_timer2 >= TMR_CMP_MIN && cmp_timer2 <= TMR_CMP_MAX);
8583
// Continuous mode
8684
// NOTE: TIMER_CTL_CNTDATEN_Msk exists in NUC472, but not in M451. In M451, TIMER_CNT is updated continuously by default.
@@ -113,31 +111,31 @@ timestamp_t lp_ticker_read()
113111
TIMER_T * timer2_base = (TIMER_T *) NU_MODBASE(timer2_modinit.modname);
114112

115113
do {
116-
uint64_t major_minor_ms;
117-
uint32_t minor_ms;
114+
uint64_t major_minor_clks;
115+
uint32_t minor_clks;
118116

119117
// NOTE: As TIMER_CNT = TIMER_CMP and counter_major has increased by one, TIMER_CNT doesn't change to 0 for one tick time.
120118
// NOTE: As TIMER_CNT = TIMER_CMP or TIMER_CNT = 0, counter_major (ISR) may not sync with TIMER_CNT. So skip and fetch stable one at the cost of 1 clock delay on this read.
121119
do {
122120
core_util_critical_section_enter();
123121

124122
// NOTE: Order of reading minor_us/carry here is significant.
125-
minor_ms = TIMER_GetCounter(timer2_base) * MS_PER_TMR2_CLK;
123+
minor_clks = TIMER_GetCounter(timer2_base);
126124
uint32_t carry = (timer2_base->INTSTS & TIMER_INTSTS_TIF_Msk) ? 1 : 0;
127125
// When TIMER_CNT approaches TIMER_CMP and will wrap soon, we may get carry but TIMER_CNT not wrapped. Hanlde carefully carry == 1 && TIMER_CNT is near TIMER_CMP.
128-
if (carry && minor_ms > (MS_PER_TMR2_INT / 2)) {
129-
major_minor_ms = (counter_major + 1) * MS_PER_TMR2_INT;
126+
if (carry && minor_clks > (TMR2_CLK_PER_TMR2_INT / 2)) {
127+
major_minor_clks = (counter_major + 1) * TMR2_CLK_PER_TMR2_INT;
130128
}
131129
else {
132-
major_minor_ms = (counter_major + carry) * MS_PER_TMR2_INT + minor_ms;
130+
major_minor_clks = (counter_major + carry) * TMR2_CLK_PER_TMR2_INT + minor_clks;
133131
}
134132

135133
core_util_critical_section_exit();
136134
}
137-
while (minor_ms == 0 || minor_ms == MS_PER_TMR2_INT);
135+
while (minor_clks == 0 || minor_clks == TMR2_CLK_PER_TMR2_INT);
138136

139137
// Add power-down compensation
140-
return (major_minor_ms * 1000 / US_PER_TICK);
138+
return ((uint64_t) major_minor_clks * US_PER_SEC / TMR3_CLK_PER_SEC / US_PER_TICK);
141139
}
142140
while (0);
143141
}
@@ -151,8 +149,8 @@ void lp_ticker_set_interrupt(timestamp_t timestamp)
151149

152150
int delta = (timestamp > now) ? (timestamp - now) : (uint32_t) ((uint64_t) timestamp + 0xFFFFFFFFu - now);
153151
// NOTE: If this event was in the past, arm an interrupt to be triggered immediately.
154-
cd_major_minor_ms = delta * US_PER_TICK / 1000;
155-
152+
cd_major_minor_clks = (uint64_t) delta * US_PER_TICK * TMR3_CLK_PER_SEC / US_PER_SEC;
153+
156154
lp_ticker_arm_cd();
157155
}
158156

@@ -177,8 +175,12 @@ static void tmr3_vec(void)
177175
{
178176
TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(timer3_modinit.modname));
179177
TIMER_ClearWakeupFlag((TIMER_T *) NU_MODBASE(timer3_modinit.modname));
180-
cd_major_minor_ms -= cd_minor_ms;
181-
if (cd_major_minor_ms > 0) {
178+
cd_major_minor_clks -= cd_minor_clks;
179+
if (cd_major_minor_clks <= 0) {
180+
// NOTE: lp_ticker_set_interrupt() may get called in lp_ticker_irq_handler();
181+
lp_ticker_irq_handler();
182+
}
183+
else {
182184
lp_ticker_arm_cd();
183185
}
184186
}
@@ -191,15 +193,16 @@ static void lp_ticker_arm_cd(void)
191193
timer3_base->CTL |= TIMER_CTL_RSTCNT_Msk;
192194
// One-shot mode, Clock = 1 KHz
193195
uint32_t clk_timer3 = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(timer3_modinit.modname));
194-
uint32_t prescale_timer3 = clk_timer3 / TMR3_CLK_FREQ - 1;
196+
uint32_t prescale_timer3 = clk_timer3 / TMR3_CLK_PER_SEC - 1;
195197
MBED_ASSERT((prescale_timer3 != (uint32_t) -1) && prescale_timer3 <= 127);
198+
MBED_ASSERT((clk_timer3 % TMR3_CLK_PER_SEC) == 0);
196199
// NOTE: TIMER_CTL_CNTDATEN_Msk exists in NUC472, but not in M451. In M451, TIMER_CNT is updated continuously by default.
197200
timer3_base->CTL &= ~(TIMER_CTL_OPMODE_Msk | TIMER_CTL_PSC_Msk/* | TIMER_CTL_CNTDATEN_Msk*/);
198201
timer3_base->CTL |= TIMER_ONESHOT_MODE | prescale_timer3/* | TIMER_CTL_CNTDATEN_Msk*/;
199202

200-
cd_minor_ms = cd_major_minor_ms;
201-
cd_minor_ms = NU_CLAMP(cd_minor_ms, TMR_CMP_MIN * MS_PER_TMR3_CLK, TMR_CMP_MAX * MS_PER_TMR3_CLK);
202-
timer3_base->CMP = cd_minor_ms / MS_PER_TMR3_CLK;
203+
cd_minor_clks = cd_major_minor_clks;
204+
cd_minor_clks = NU_CLAMP(cd_minor_clks, TMR_CMP_MIN, TMR_CMP_MAX);
205+
timer3_base->CMP = cd_minor_clks;
203206

204207
TIMER_EnableInt(timer3_base);
205208
TIMER_EnableWakeup((TIMER_T *) NU_MODBASE(timer3_modinit.modname));

‎targets/TARGET_NUVOTON/TARGET_NUC472/lp_ticker.c

Lines changed: 33 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -24,25 +24,22 @@
2424
#include "critical.h"
2525

2626
// lp_ticker tick = us = timestamp
27-
// clock of timer peripheral = ms
28-
#define US_PER_TICK (1)
27+
#define US_PER_TICK (1)
28+
#define US_PER_SEC (1000 * 1000)
2929

30-
#define MS_PER_TMR2_INT (1000 * 10)
31-
#define TMR2_FIRE_FREQ (1000 / MS_PER_TMR2_INT)
32-
#define MS_PER_TMR2_CLK 1
33-
#define TMR2_CLK_FREQ (1000 / MS_PER_TMR2_CLK)
34-
35-
#define MS_PER_TMR3_CLK 1
36-
#define TMR3_CLK_FREQ (1000 / MS_PER_TMR3_CLK)
30+
#define US_PER_TMR2_INT (US_PER_SEC * 10)
31+
#define TMR2_CLK_PER_SEC (__LXT)
32+
#define TMR2_CLK_PER_TMR2_INT ((uint32_t) ((uint64_t) US_PER_TMR2_INT * TMR2_CLK_PER_SEC / US_PER_SEC))
33+
#define TMR3_CLK_PER_SEC (__LXT)
3734

3835
static void tmr2_vec(void);
3936
static void tmr3_vec(void);
4037
static void lp_ticker_arm_cd(void);
4138

4239
static int lp_ticker_inited = 0;
4340
static volatile uint32_t counter_major = 0;
44-
static volatile int cd_major_minor_ms = 0;
45-
static volatile int cd_minor_ms = 0;
41+
static volatile int cd_major_minor_clks = 0;
42+
static volatile int cd_minor_clks = 0;
4643
static volatile uint32_t wakeup_tick = (uint32_t) -1;
4744

4845
// NOTE: To wake the system from power down mode, timer clock source must be ether LXT or LIRC.
@@ -61,8 +58,8 @@ void lp_ticker_init(void)
6158
lp_ticker_inited = 1;
6259

6360
counter_major = 0;
64-
cd_major_minor_ms = 0;
65-
cd_minor_ms = 0;
61+
cd_major_minor_clks = 0;
62+
cd_minor_clks = 0;
6663
wakeup_tick = (uint32_t) -1;
6764

6865
// Reset module
@@ -78,9 +75,10 @@ void lp_ticker_init(void)
7875

7976
// Configure clock
8077
uint32_t clk_timer2 = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(timer2_modinit.modname));
81-
uint32_t prescale_timer2 = clk_timer2 / TMR2_CLK_FREQ - 1;
78+
uint32_t prescale_timer2 = clk_timer2 / TMR2_CLK_PER_SEC - 1;
8279
MBED_ASSERT((prescale_timer2 != (uint32_t) -1) && prescale_timer2 <= 127);
83-
uint32_t cmp_timer2 = MS_PER_TMR2_INT / MS_PER_TMR2_CLK;
80+
MBED_ASSERT((clk_timer2 % TMR2_CLK_PER_SEC) == 0);
81+
uint32_t cmp_timer2 = TMR2_CLK_PER_TMR2_INT;
8482
MBED_ASSERT(cmp_timer2 >= TMR_CMP_MIN && cmp_timer2 <= TMR_CMP_MAX);
8583
// Continuous mode
8684
((TIMER_T *) NU_MODBASE(timer2_modinit.modname))->CTL = TIMER_PERIODIC_MODE | prescale_timer2 | TIMER_CTL_CNTDATEN_Msk;
@@ -112,31 +110,31 @@ timestamp_t lp_ticker_read()
112110
TIMER_T * timer2_base = (TIMER_T *) NU_MODBASE(timer2_modinit.modname);
113111

114112
do {
115-
uint64_t major_minor_ms;
116-
uint32_t minor_ms;
113+
uint64_t major_minor_clks;
114+
uint32_t minor_clks;
117115

118116
// NOTE: As TIMER_CNT = TIMER_CMP and counter_major has increased by one, TIMER_CNT doesn't change to 0 for one tick time.
119117
// NOTE: As TIMER_CNT = TIMER_CMP or TIMER_CNT = 0, counter_major (ISR) may not sync with TIMER_CNT. So skip and fetch stable one at the cost of 1 clock delay on this read.
120118
do {
121119
core_util_critical_section_enter();
122120

123121
// NOTE: Order of reading minor_us/carry here is significant.
124-
minor_ms = TIMER_GetCounter(timer2_base) * MS_PER_TMR2_CLK;
122+
minor_clks = TIMER_GetCounter(timer2_base);
125123
uint32_t carry = (timer2_base->INTSTS & TIMER_INTSTS_TIF_Msk) ? 1 : 0;
126124
// When TIMER_CNT approaches TIMER_CMP and will wrap soon, we may get carry but TIMER_CNT not wrapped. Hanlde carefully carry == 1 && TIMER_CNT is near TIMER_CMP.
127-
if (carry && minor_ms > (MS_PER_TMR2_INT / 2)) {
128-
major_minor_ms = (counter_major + 1) * MS_PER_TMR2_INT;
125+
if (carry && minor_clks > (TMR2_CLK_PER_TMR2_INT / 2)) {
126+
major_minor_clks = (counter_major + 1) * TMR2_CLK_PER_TMR2_INT;
129127
}
130128
else {
131-
major_minor_ms = (counter_major + carry) * MS_PER_TMR2_INT + minor_ms;
129+
major_minor_clks = (counter_major + carry) * TMR2_CLK_PER_TMR2_INT + minor_clks;
132130
}
133131

134132
core_util_critical_section_exit();
135133
}
136-
while (minor_ms == 0 || minor_ms == MS_PER_TMR2_INT);
134+
while (minor_clks == 0 || minor_clks == TMR2_CLK_PER_TMR2_INT);
137135

138136
// Add power-down compensation
139-
return (major_minor_ms * 1000 / US_PER_TICK);
137+
return ((uint64_t) major_minor_clks * US_PER_SEC / TMR3_CLK_PER_SEC / US_PER_TICK);
140138
}
141139
while (0);
142140
}
@@ -150,7 +148,7 @@ void lp_ticker_set_interrupt(timestamp_t timestamp)
150148

151149
int delta = (timestamp > now) ? (timestamp - now) : (uint32_t) ((uint64_t) timestamp + 0xFFFFFFFFu - now);
152150
// NOTE: If this event was in the past, arm an interrupt to be triggered immediately.
153-
cd_major_minor_ms = delta * US_PER_TICK / 1000;
151+
cd_major_minor_clks = (uint64_t) delta * US_PER_TICK * TMR3_CLK_PER_SEC / US_PER_SEC;
154152

155153
lp_ticker_arm_cd();
156154
}
@@ -176,8 +174,12 @@ static void tmr3_vec(void)
176174
{
177175
TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(timer3_modinit.modname));
178176
TIMER_ClearWakeupFlag((TIMER_T *) NU_MODBASE(timer3_modinit.modname));
179-
cd_major_minor_ms -= cd_minor_ms;
180-
if (cd_major_minor_ms > 0) {
177+
cd_major_minor_clks -= cd_minor_clks;
178+
if (cd_major_minor_clks <= 0) {
179+
// NOTE: lp_ticker_set_interrupt() may get called in lp_ticker_irq_handler();
180+
lp_ticker_irq_handler();
181+
}
182+
else {
181183
lp_ticker_arm_cd();
182184
}
183185
}
@@ -190,14 +192,15 @@ static void lp_ticker_arm_cd(void)
190192
timer3_base->CTL |= TIMER_CTL_RSTCNT_Msk;
191193
// One-shot mode, Clock = 1 KHz
192194
uint32_t clk_timer3 = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(timer3_modinit.modname));
193-
uint32_t prescale_timer3 = clk_timer3 / TMR3_CLK_FREQ - 1;
195+
uint32_t prescale_timer3 = clk_timer3 / TMR3_CLK_PER_SEC - 1;
194196
MBED_ASSERT((prescale_timer3 != (uint32_t) -1) && prescale_timer3 <= 127);
197+
MBED_ASSERT((clk_timer3 % TMR3_CLK_PER_SEC) == 0);
195198
timer3_base->CTL &= ~(TIMER_CTL_OPMODE_Msk | TIMER_CTL_PSC_Msk | TIMER_CTL_CNTDATEN_Msk);
196199
timer3_base->CTL |= TIMER_ONESHOT_MODE | prescale_timer3 | TIMER_CTL_CNTDATEN_Msk;
197200

198-
cd_minor_ms = cd_major_minor_ms;
199-
cd_minor_ms = NU_CLAMP(cd_minor_ms, TMR_CMP_MIN * MS_PER_TMR3_CLK, TMR_CMP_MAX * MS_PER_TMR3_CLK);
200-
timer3_base->CMP = cd_minor_ms / MS_PER_TMR3_CLK;
201+
cd_minor_clks = cd_major_minor_clks;
202+
cd_minor_clks = NU_CLAMP(cd_minor_clks, TMR_CMP_MIN, TMR_CMP_MAX);
203+
timer3_base->CMP = cd_minor_clks;
201204

202205
TIMER_EnableInt(timer3_base);
203206
TIMER_EnableWakeup((TIMER_T *) NU_MODBASE(timer3_modinit.modname));

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