Make use of the other 32K of RAM if not used by libraries, least priority is IRAM1 to help maximise heap availability. Most beneficial when LWIP is not in use.

chrissnow · adbridge · commit 53153ffa08cf · 2019-08-23T11:41:08.000+01:00
diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct
@@ -29,17 +29,20 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE  {    ; load region size_region
   ; 8_byte_aligned(49 vect * 4 bytes) =  8_byte_aligned(0xC4) = 0xC8
   ; 32KB (RAM size) - 0xC8 (NIVT) - 32 (topmost 32 bytes used by IAP functions) = 0x7F18
   RW_IRAM1 0x100000C8 0x7F18-Stack_Size  {
-   .ANY (+RW +ZI)
+   .ANY1 (+RW +ZI)
   }
   ARM_LIB_STACK (0x100000C8+0x7F18) EMPTY -Stack_Size { ; stack
   }
   RW_IRAM2 0x2007C000 0x4000  {  ; RW data, ETH RAM
    .ANY (AHBSRAM0)
+   .ANY2 (+RW +ZI)
   }
   RW_IRAM3 0x20080000 0x4000  {  ; RW data, ETH RAM
    .ANY (AHBSRAM1)
+   .ANY3 (+RW +ZI)
   }
   RW_IRAM4 0x40038000 0x0800  {  ; RW data, CAN RAM
    .ANY (CANRAM)
+   .ANY4 (+RW +ZI)
   }
 }

Original file line number	Diff line number	Diff line change
`@@ -29,17 +29,20 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region`
`29`	`29`	`; 8_byte_aligned(49 vect * 4 bytes) = 8_byte_aligned(0xC4) = 0xC8`
`30`	`30`	`; 32KB (RAM size) - 0xC8 (NIVT) - 32 (topmost 32 bytes used by IAP functions) = 0x7F18`
`31`	`31`	`RW_IRAM1 0x100000C8 0x7F18-Stack_Size {`
`32`		`- .ANY (+RW +ZI)`
	`32`	`+ .ANY1 (+RW +ZI)`
`33`	`33`	`}`
`34`	`34`	`ARM_LIB_STACK (0x100000C8+0x7F18) EMPTY -Stack_Size { ; stack`
`35`	`35`	`}`
`36`	`36`	`RW_IRAM2 0x2007C000 0x4000 { ; RW data, ETH RAM`
`37`	`37`	`.ANY (AHBSRAM0)`
	`38`	`+ .ANY2 (+RW +ZI)`
`38`	`39`	`}`
`39`	`40`	`RW_IRAM3 0x20080000 0x4000 { ; RW data, ETH RAM`
`40`	`41`	`.ANY (AHBSRAM1)`
	`42`	`+ .ANY3 (+RW +ZI)`
`41`	`43`	`}`
`42`	`44`	`RW_IRAM4 0x40038000 0x0800 { ; RW data, CAN RAM`
`43`	`45`	`.ANY (CANRAM)`
	`46`	`+ .ANY4 (+RW +ZI)`
`44`	`47`	`}`
`45`	`48`	`}`