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ccli8adbridge
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Change UART RTS/CTS to low level active
1 parent acafdf8 commit 5510375

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4 files changed

+28
-16
lines changed

4 files changed

+28
-16
lines changed

targets/TARGET_NUVOTON/TARGET_M451/serial_api.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -300,8 +300,8 @@ void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, Pi
300300
MBED_ASSERT(uart_rts == obj->serial.uart);
301301
// Enable the pin for RTS function
302302
pinmap_pinout(rxflow, PinMap_UART_RTS);
303-
// nRTS pin output is high level active
304-
uart_base->MODEM = (uart_base->MODEM & ~UART_MODEM_RTSACTLV_Msk);
303+
// nRTS pin output is low level active
304+
uart_base->MODEM |= UART_MODEM_RTSACTLV_Msk;
305305
uart_base->FIFO = (uart_base->FIFO & ~UART_FIFO_RTSTRGLV_Msk) | UART_FIFO_RTSTRGLV_8BYTES;
306306
// Enable RTS
307307
uart_base->INTEN |= UART_INTEN_ATORTSEN_Msk;
@@ -313,8 +313,8 @@ void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, Pi
313313
MBED_ASSERT(uart_cts == obj->serial.uart);
314314
// Enable the pin for CTS function
315315
pinmap_pinout(txflow, PinMap_UART_CTS);
316-
// nCTS pin input is high level active
317-
uart_base->MODEMSTS = (uart_base->MODEMSTS & ~UART_MODEMSTS_CTSACTLV_Msk);
316+
// nCTS pin input is low level active
317+
uart_base->MODEMSTS |= UART_MODEMSTS_CTSACTLV_Msk;
318318
// Enable CTS
319319
uart_base->INTEN |= UART_INTEN_ATOCTSEN_Msk;
320320
}

targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_uart.c

Lines changed: 15 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
/**************************************************************************//**
22
* @file uart.c
33
* @version V1.00
4-
* $Revision: 13 $
5-
* $Date: 14/10/03 1:55p $
4+
* $Revision: 14 $
5+
* $Date: 15/11/26 10:47a $
66
* @brief NUC472/NUC442 UART driver source file
77
*
88
* @note
@@ -118,7 +118,7 @@ void UART_DisableInt(UART_T* uart, uint32_t u32InterruptFlag )
118118
void UART_EnableFlowCtrl(UART_T* uart )
119119
{
120120
uart->MODEM |= UART_MODEM_RTSACTLV_Msk;
121-
uart->MODEM &= UART_MODEM_RTS_Msk;
121+
uart->MODEM &= ~UART_MODEM_RTS_Msk;
122122
uart->MODEMSTS |= UART_MODEMSTS_CTSACTLV_Msk;
123123
uart->INTEN |= UART_INTEN_ATORTSEN_Msk | UART_INTEN_ATOCTSEN_Msk;
124124
}
@@ -161,7 +161,7 @@ void UART_Open(UART_T* uart, uint32_t u32baudrate)
161161
uint32_t u32Clk;
162162
uint32_t u32Baud_Div;
163163

164-
u32ClkTbl[1] = CLK_GetPLLClockFreq();;
164+
u32ClkTbl[1] = CLK_GetPLLClockFreq();
165165

166166
u8UartClkSrcSel = (CLK->CLKSEL1 & CLK_CLKSEL1_UARTSEL_Msk) >> CLK_CLKSEL1_UARTSEL_Pos;
167167

@@ -272,7 +272,17 @@ void UART_SetTimeoutCnt(UART_T* uart, uint32_t u32TOC)
272272
*/
273273
void UART_SelectIrDAMode(UART_T* uart, uint32_t u32Buadrate, uint32_t u32Direction)
274274
{
275-
uart->BAUD = UART_BAUD_MODE0 | UART_BAUD_MODE0_DIVIDER(12000000, 57600);
275+
uint8_t u8UartClkSrcSel;
276+
uint32_t u32ClkTbl[4] = {__HXT, 0, __HIRC, __HIRC};
277+
uint32_t u32Clk;
278+
279+
u32ClkTbl[1] = CLK_GetPLLClockFreq();
280+
281+
u8UartClkSrcSel = (CLK->CLKSEL1 & CLK_CLKSEL1_UARTSEL_Msk) >> CLK_CLKSEL1_UARTSEL_Pos;
282+
283+
u32Clk = (u32ClkTbl[u8UartClkSrcSel]) / (((CLK->CLKDIV0 & CLK_CLKDIV0_UARTDIV_Msk) >> CLK_CLKDIV0_UARTDIV_Pos) + 1);
284+
285+
uart->BAUD = UART_BAUD_MODE0 | UART_BAUD_MODE0_DIVIDER(u32Clk, u32Buadrate);
276286

277287
uart->IRDA &= ~UART_IRDA_TXINV_Msk;
278288
uart->IRDA |= UART_IRDA_RXINV_Msk;

targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_uart.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
/**************************************************************************//**
22
* @file uart.h
33
* @version V1.00
4-
* $Revision: 19 $
5-
* $Date: 14/10/07 9:28a $
4+
* $Revision: 20 $
5+
* $Date: 15/11/30 1:35p $
66
* @brief NUC472/NUC442 UART driver header file
77
*
88
* @note
@@ -310,7 +310,7 @@ extern "C"
310310
* - \ref UART_INTSTS_LINIF_Msk : LIN Bus Flag.
311311
* - \ref UART_INTSTS_BUFERRIF_Msk : Buffer Error Interrupt Flag
312312
* - \ref UART_INTSTS_RXTOIF_Msk : Rx time-out interrupt Flag
313-
* - \ref UART_INTSTS_MODENIF_Msk : Modem interrupt Flag
313+
* - \ref UART_INTSTS_MODEMIF_Msk : Modem interrupt Flag
314314
* - \ref UART_INTSTS_RLSIF_Msk : Rx Line status interrupt Flag
315315
* - \ref UART_INTSTS_THREIF_Msk : Tx empty interrupt Flag
316316
* - \ref UART_INTSTS_RDAIF_Msk : Rx ready interrupt Flag

targets/TARGET_NUVOTON/TARGET_NUC472/serial_api.c

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -330,8 +330,10 @@ void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, Pi
330330
MBED_ASSERT(uart_rts == obj->serial.uart);
331331
// Enable the pin for RTS function
332332
pinmap_pinout(rxflow, PinMap_UART_RTS);
333-
// nRTS pin output is high level active
334-
uart_base->MODEM = (uart_base->MODEM & ~UART_MODEM_RTSACTLV_Msk) | UART_MODEM_RTSACTLV_Msk;
333+
// nRTS pin output is low level active
334+
uart_base->MODEM |= UART_MODEM_RTSACTLV_Msk;
335+
uart_base->MODEM &= ~UART_MODEM_RTS_Msk;
336+
335337
uart_base->FIFO = (uart_base->FIFO & ~UART_FIFO_RTSTRGLV_Msk) | UART_FIFO_RTSTRGLV_8BYTES;
336338
// Enable RTS
337339
uart_base->INTEN |= UART_INTEN_ATORTSEN_Msk;
@@ -343,8 +345,8 @@ void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, Pi
343345
MBED_ASSERT(uart_cts == obj->serial.uart);
344346
// Enable the pin for CTS function
345347
pinmap_pinout(txflow, PinMap_UART_CTS);
346-
// nCTS pin input is high level active
347-
uart_base->MODEMSTS = (uart_base->MODEMSTS & ~UART_MODEMSTS_CTSACTLV_Msk) | UART_MODEMSTS_CTSACTLV_Msk;
348+
// nCTS pin input is low level active
349+
uart_base->MODEMSTS |= UART_MODEMSTS_CTSACTLV_Msk;
348350
// Enable CTS
349351
uart_base->INTEN |= UART_INTEN_ATOCTSEN_Msk;
350352
}

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