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STM32F0: code alignment
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/* mbed Microcontroller Library
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* SPDX-License-Identifier: BSD-3-Clause
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******************************************************************************
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*
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* Copyright (c) 2015-2020 STMicroelectronics.
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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#ifndef MBED_PERIPHERALNAMES_H
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#define MBED_PERIPHERALNAMES_H
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#include "cmsis.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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ADC_1 = (int)ADC1_BASE
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} ADCName;
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#if defined DAC_BASE
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typedef enum {
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DAC_1 = (int)DAC_BASE
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} DACName;
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#endif
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typedef enum {
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UART_1 = (int)USART1_BASE,
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UART_2 = (int)USART2_BASE,
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UART_3 = (int)USART3_BASE,
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UART_4 = (int)USART4_BASE,
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#if defined USART5_BASE
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UART_5 = (int)USART5_BASE,
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#endif
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#if defined USART6_BASE
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UART_6 = (int)USART6_BASE,
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#endif
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#if defined USART7_BASE
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UART_7 = (int)USART7_BASE,
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#endif
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#if defined USART8_BASE
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UART_8 = (int)USART8_BASE,
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#endif
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} UARTName;
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#define DEVICE_SPI_COUNT 2
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typedef enum {
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SPI_1 = (int)SPI1_BASE,
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SPI_2 = (int)SPI2_BASE
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} SPIName;
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typedef enum {
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I2C_1 = (int)I2C1_BASE,
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I2C_2 = (int)I2C2_BASE
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} I2CName;
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typedef enum {
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PWM_1 = (int)TIM1_BASE,
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#if defined TIM2_BASE
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PWM_2 = (int)TIM2_BASE,
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#endif
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PWM_3 = (int)TIM3_BASE,
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PWM_14 = (int)TIM14_BASE,
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PWM_15 = (int)TIM15_BASE,
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PWM_16 = (int)TIM16_BASE,
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PWM_17 = (int)TIM17_BASE
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} PWMName;
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#if defined CAN_BASE
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typedef enum {
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CAN_1 = (int)CAN_BASE
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} CANName;
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#endif
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#if defined USB_BASE
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typedef enum {
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USB_FS = (int)USB_BASE,
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} USBName;
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif

targets/TARGET_STM/TARGET_STM32F0/STM32Cube_FW/CMSIS/system_stm32f0xx.h

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@@ -101,8 +101,6 @@ extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
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extern void SystemInit(void);
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extern void SystemCoreClockUpdate(void);
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extern void SetSysClock(void);
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/**
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* @}
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*/

targets/TARGET_STM/TARGET_STM32F0/STM32Cube_FW/STM32F0xx_HAL_Driver/stm32f0xx_hal_adc.h

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/* Includes ------------------------------------------------------------------*/
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#include "stm32f0xx_hal_def.h"
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/* Include low level driver */
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#include "stm32f0xx_ll_adc.h"
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/** @addtogroup STM32F0xx_HAL_Driver
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* @{
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*/

targets/TARGET_STM/TARGET_STM32F0/STM32Cube_FW/STM32F0xx_HAL_Driver/stm32f0xx_hal_def.h

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/* Includes ------------------------------------------------------------------*/
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#include "stm32f0xx.h"
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#if defined(USE_HAL_LEGACY)
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#include "stm32_hal_legacy.h"
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#include "Legacy/stm32_hal_legacy.h"
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#endif
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#include <stdio.h>
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targets/TARGET_STM/TARGET_STM32F0/STM32Cube_FW/STM32F0xx_HAL_Driver/stm32f0xx_hal_rtc.h

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/* Includes ------------------------------------------------------------------*/
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#include "stm32f0xx_hal_def.h"
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#include "stm32f0xx_ll_rtc.h"
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/** @addtogroup STM32F0xx_HAL_Driver
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* @{

targets/TARGET_STM/TARGET_STM32F0/STM32Cube_FW/stm32f0xx_hal_conf.h

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/* Exported macro ------------------------------------------------------------*/
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#ifdef USE_FULL_ASSERT
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/* ALL MBED targets use same stm32_assert.h */
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#include "stm32_assert.h"
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#include "stm32_assert.h" // MBED patch
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#else
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#define assert_param(expr) ((void)0U)
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#endif /* USE_FULL_ASSERT */

targets/TARGET_STM/TARGET_STM32F0/STM32Cube_FW/system_stm32f0xx.c

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* @author MCD Application Team
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* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
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*
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* This file provides two functions and one global variable to be called from
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* 1. This file provides two functions and one global variable to be called from
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* user application:
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* - SystemInit(): This function is called at startup just after reset and
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* before branch to main program. This call is made inside
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* be called whenever the core clock is changed
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* during program execution.
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*
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* 2. After each device reset the HSI (8 MHz) is used as system clock source.
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* Then SystemInit() function is called, in "startup_stm32f0xx.s" file, to
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* configure the system clock before to branch to main program.
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*
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* 3. This file configures the system clock as follows:
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*=============================================================================
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* Supported STM32F0xx device
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*-----------------------------------------------------------------------------
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* System Clock source | HSI
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*-----------------------------------------------------------------------------
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* SYSCLK(Hz) | 8000000
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*-----------------------------------------------------------------------------
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* HCLK(Hz) | 8000000
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*-----------------------------------------------------------------------------
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* AHB Prescaler | 1
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*-----------------------------------------------------------------------------
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* APB1 Prescaler | 1
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*-----------------------------------------------------------------------------
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*=============================================================================
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******************************************************************************
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* @attention
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*
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* @{
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*/
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/*+ MBED */
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#if 0
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/*- MBED */
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/**
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* @brief Setup the microcontroller system.
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* Initialize the default HSI clock source, vector table location and the PLL configuration is reset.
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}
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/*+ MBED */
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#endif
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/*- MBED */
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/**
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* @brief Update SystemCoreClock variable according to Clock Register Values.
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* The SystemCoreClock variable contains the core clock (HCLK), it can

targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/PeripheralNames.h

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targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/cmsis_nvic.c

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targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/objects.h

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