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tests/TESTS/mbed_hal/critical_section Expand file tree Collapse file tree 5 files changed +8
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lines changed Original file line number Diff line number Diff line change @@ -128,7 +128,7 @@ static void mbed_cpy_nvic(void)
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VTOR register and for A9 for which CMSIS doesn't define NVIC_SetVector; in both cases target code is
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responsible for correctly handling the vectors.
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*/
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- #if !defined(__CORTEX_M0 ) && !defined(__CORTEX_A9 )
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+ #if !defined(__CORTEX_M0 ) && !defined(__CORTEX_A )
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#ifdef NVIC_RAM_VECTOR_ADDRESS
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uint32_t * old_vectors = (uint32_t * )SCB -> VTOR ;
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uint32_t * vectors = (uint32_t * )NVIC_RAM_VECTOR_ADDRESS ;
@@ -137,5 +137,5 @@ static void mbed_cpy_nvic(void)
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}
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SCB -> VTOR = (uint32_t )NVIC_RAM_VECTOR_ADDRESS ;
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#endif /* NVIC_RAM_VECTOR_ADDRESS */
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- #endif /* !defined(__CORTEX_M0) && !defined(__CORTEX_A9 ) */
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+ #endif /* !defined(__CORTEX_M0) && !defined(__CORTEX_A ) */
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}
Original file line number Diff line number Diff line change @@ -26,7 +26,7 @@ static bool state_saved = false;
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static bool are_interrupts_enabled (void )
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{
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- #if defined(__CORTEX_A9 )
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+ #if defined(__CORTEX_A )
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return ((__get_CPSR () & 0x80 ) == 0 );
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#else
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return ((__get_PRIMASK () & 0x1 ) == 0 );
Original file line number Diff line number Diff line change @@ -29,7 +29,7 @@ using utest::v1::Case;
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bool test_are_interrupts_enabled (void )
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{
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- #if defined(__CORTEX_A9 )
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+ #if defined(__CORTEX_A )
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return ((__get_CPSR () & 0x80 ) == 0 );
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#else
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return ((__get_PRIMASK () & 0x1 ) == 0 );
Original file line number Diff line number Diff line change @@ -27,7 +27,7 @@ static uint32_t critical_section_reentrancy_counter = 0;
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bool core_util_are_interrupts_enabled (void )
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{
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- #if defined(__CORTEX_A9 )
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+ #if defined(__CORTEX_A )
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return ((__get_CPSR () & 0x80 ) == 0 );
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#else
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return ((__get_PRIMASK () & 0x1 ) == 0 );
@@ -36,7 +36,7 @@ bool core_util_are_interrupts_enabled(void)
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bool core_util_is_isr_active (void )
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{
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- #if defined(__CORTEX_A9 )
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+ #if defined(__CORTEX_A )
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switch (__get_CPSR () & 0x1FU ) {
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case CPSR_M_USR :
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case CPSR_M_SYS :
Original file line number Diff line number Diff line change @@ -63,7 +63,7 @@ void mbed_copy_nvic(void)
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VTOR register and for A9 for which CMSIS doesn't define NVIC_SetVector; in both cases target code is
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responsible for correctly handling the vectors.
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*/
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- #if !defined(__CORTEX_M0 ) && !defined(__CORTEX_A9 )
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+ #if !defined(__CORTEX_M0 ) && !defined(__CORTEX_A )
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#ifdef NVIC_RAM_VECTOR_ADDRESS
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uint32_t * old_vectors = (uint32_t * )SCB -> VTOR ;
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uint32_t * vectors = (uint32_t * )NVIC_RAM_VECTOR_ADDRESS ;
@@ -72,7 +72,7 @@ void mbed_copy_nvic(void)
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}
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SCB -> VTOR = (uint32_t )NVIC_RAM_VECTOR_ADDRESS ;
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#endif /* NVIC_RAM_VECTOR_ADDRESS */
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- #endif /* !defined(__CORTEX_M0) && !defined(__CORTEX_A9 ) */
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+ #endif /* !defined(__CORTEX_M0) && !defined(__CORTEX_A ) */
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}
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void mbed_init (void )
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